TPIC5223L

2-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL

POWER DMOS ARRAY

SLIS043A – NOVEMBER 1994 – REVISED SEPTEMBER 1995

6

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

VDD = 25 V

14 mH

ID

tw

tav

IAS

V(BR)DSX = 60 V Min

VOLTAGE AND CURRENT WAVEFORMS

0 V

0 V

0 V

ID

VDS

DUT

VDS

TEST CIRCUIT

(see Note A)

(see Note B)

Pulse Generator

50

Ω

Rgen

50

Ω

VGS

VGS

5 V

NOTES: A. The pulse generator has the following characteristics: tr ≤ 10 ns, tf ≤ 10 ns, ZO = 50 Ω.

B. Input pulse duration (tw) is increased until peak current IAS = 3 A.

Energy test level is defined as E

AS +

I

AS

V

(BR)DSX

tav

2

Figure 4. Single-Pulse Avalanche-Energy Test Circuit and Waveforms

TYPICAL CHARACTERISTICS

Figure 5

GATE-TO-SOURCE THRESHOLD VOLTAGE

vs

JUNCTION TEMPERATURE

TJ – Junction Temperature – °C

1

0.5

0

1.5

2

2.5

– 40 – 20

0

20

40

60

80

100 120 140 160

VDS = VGS

ID = 1 mA

ID = 100 µA

STATIC DRAIN-TO-SOURCE ON-STATE RESISTANCE

vs

JUNCTION TEMPERATURE

TJ – Junction Temperature – °C

0.4

0.2

0

0.6

0.8

1

– 40 – 20

0

20

40

60

80

100 120 140 160

ID = 1 A

VGS = 4.5 V

VGS = 5 V

Figure 6