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TPL5110DDCR 데이터시트(PDF) 4 Page - Texas Instruments

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부품명 TPL5110DDCR
상세설명  TPL5110 Nano-power System Timer for Power Gating
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TPL5110
SNAS650 – JANUARY 2015 – REVISED JANUARY 2015
www.ti.com
Product Folder Links: TPL5110
Submit Documentation Feedback
Copyright © 2015, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The voltage between any two pins should not exceed 6V.
(3)
The maximum power dissipation is a function of TJ(MAX), θJA, and the ambient temperature, TA. The maximum allowable power
dissipation at any ambient temperature is PDMAX = (TJ(MAX) - TA)/ θJA. All numbers apply for packages soldered directly onto a PC
board.
7 Specifications
7.1 Absolute Maximum Ratings
(1)
MIN
MAX
UNIT
Supply Voltage (VDD-GND)
-0.3
6.0
V
Input Voltage at any pin(2)
-0.3
VDD + 0.3
V
Input Current on any pin
-5
+5
mA
Storage Temperature, Tstg
-65
150
°C
Junction Temperature, TJ(3)
150
°C
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human Body Model, per ANSI/ESDA/JEDEC JS-001(1)
±1000
V
Charged-device model (CDM), per JEDEC specification JESD22-101(2)
±250
7.3 Recommended Operating Ratings
MIN
MAX
UNIT
Supply Voltage (VDD-GND)
1.8
5.5
V
Temperature Range
-40
105
°C
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
7.4 Thermal Information
THERMAL METRIC(1)
TPL5110
UNIT
SOT23
6 PINS
RθJA
Junction-to-ambient thermal resistance
163
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
26
RθJB
Junction-to-board thermal resistance
57
ψJT
Junction-to-top characterization parameter
7.5
ψJB
Junction-to-board characterization parameter
57
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A


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