© Semiconductor Components Industries, LLC, 2016

July, 2016 − Rev. 12

1

Publication Order Number:

MC10E452/D

MC10E452, MC100E452

5V ECL 5‐Bit Differential

Register

Description

The MC10E/100E452 is a 5-bit differential register with differential

data (inputs and outputs) and clock. The registers are triggered by a

positive transition of the positive clock (CLK) input. A high on the

Master Reset (MR) asynchronously resets all registers so that the Q

outputs go LOW.

The differential input structures are clamped so that the inputs of

unused registers can be left open without upsetting the bias network of

the device. The clamping action will assert the D and the CLK sides of

the inputs. Because of the edge triggered flip-flop nature of the device

simultaneously opening both the clock and data inputs will result in an

output which reaches an unidentified but valid state. Note that the

The fully differential design of the device makes it ideal for very

high frequency applications where a registered data path is necessary.

this device only. For single-ended input conditions, the unused

The 100 Series contains temperature compensation.

Features

Low State When Inputs Are Left Open

MARKING DIAGRAM*

xxx

= 10 or 100

A

= Assembly Location

WL

= Wafer Lot

YY

= Year

WW

= Work Week

G

= Pb-Free Package

PLCC−28

FN SUFFIX

CASE 776−02

www.onsemi.com

MCxxxE452FNG

AWLYYWW

128

ORDERING INFORMATION

Device

Package

MC10E452FNR2G

PLCC−28

(Pb-Free)

500/Tape & Reel

MC100E452FNG

PLCC−28

(Pb-Free)

37 Units/Tube

*For additional marking information, refer to

Application Note AND8002/D.

†For information on tape and reel specifications, in-

cluding part orientation and tape sizes, please refer

to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.