전자부품 데이터시트 검색엔진 |
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LM3671MF-1.25 데이터시트(PDF) 2 Page - National Semiconductor (TI) |
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LM3671MF-1.25 데이터시트(HTML) 2 Page - National Semiconductor (TI) |
2 / 16 page Typical Application Circuits (Continued) Connection Diagram and Package Mark Information Pin Description Pin # Name Description 1V IN Power supply input. Connect to the input filter capacitor (Figure 1). 2 GND Ground pin. 3 EN Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled when >1.0V. Do not leave this pin floating. 4 FB Feedback analog input. Connect directly to the output filter capacitor for fixed voltage versions. For adjustable version external resistor dividers are required. The internal resistor dividers are disabled for the adjustable version. 5 SW Switching node connection to the internal PFET switch and NFET synchronous rectifier. 20108431 FIGURE 2. Typical Application Circuit for ADJ version SOT23-5 Package NS Package Number MF05A 20108402 Note: The actual physical placement of the package marking will vary from part to part. FIGURE 3. Top View www.national.com 2 |
유사한 부품 번호 - LM3671MF-1.25 |
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유사한 설명 - LM3671MF-1.25 |
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