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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TC7660S 데이터시트(PDF) 10 Page - Microchip Technology |
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TC7660S 데이터시트(HTML) 10 Page - Microchip Technology |
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10 / 24 page  TC7660S DS20001467C-page 10 2001-2015 Microchip Technology Inc. 5.3 Cascading Devices The TC7660S may be cascaded as shown (Figure 5-3) to produce larger negative multiplication of the initial supply voltage. However, due to the finite efficiency of each device, the practical limit is 10 devices for light loads. The output voltage is defined by: EQUATION where n is an integer representing the number of devices cascaded. The resulting output resistance would be approximately the weighted sum of the individual TC7660S ROUT values. 5.4 Changing the TC7660S Oscillator Frequency It may be desirable in some applications (due to noise or other considerations) to increase the oscillator fre- quency. Pin 1, frequency boost pin, may be connected to V+ to increase oscillator frequency to 45 kHz from a nominal of 10 kHz for an input supply voltage of 5.0V. The oscillator may also be synchronized to an external clock as shown in Figure 5-4. In order to prevent possi- ble device latch-up, a 1 kΩ resistor must be used in series with the clock output. In a situation where the designer has generated the external clock frequency using TTL logic, the addition of a 10 kΩ pull-up resistor to V+ supply is required. Note that the pump frequency with external clocking, as with internal clocking, will be half of the clock frequency. Output transitions occur on the positive-going edge of the clock. FIGURE 5-4: External Clocking. It is also possible to increase the conversion efficiency of the TC7660S at low load levels by lowering the oscillator frequency. This reduces the switching losses, and is achieved by connecting an additional capacitor, COSC, as shown in Figure 5-5. Lowering the oscillator frequency will cause an undesirable increase in the impedance of the pump (C1) and the reservoir (C2) capacitors. To overcome this, increase the values of C1 and C2 by the same factor that the frequency has been reduced. For example, the addition of a 100 pF capacitor between pin 7 (OSC) and pin 8 (V+) will lower the oscillator frequency to 1 kHz from its nominal frequency of 10 kHz (a multiple of 10), and necessitate a corresponding increase in the values of C1 and C2 (from 10 µF to 100 µF). FIGURE 5-5: Lowering Oscillator Frequency. 5.5 Positive Voltage Multiplication The TC7660S may be employed to achieve positive voltage multiplication using the circuit shown in Figure 5-6. In this application, the pump inverter switches of the TC7660S are used to charge C1 to a voltage level of V+–VF (where V+ is the supply voltage and VF is the forward voltage drop of diode D1). On the transfer cycle, the voltage on C1 plus the supply voltage (V+) is applied through diode D2 to capacitor C2. The voltage thus created on C2 becomes (2V+) – (2VF), or twice the supply voltage minus the combined forward voltage drops of diodes D1 and D2. The source impedance of the output (VOUT) will depend on the output current, but for V+ = 5V and an output current of 10 mA, it will be approximately 60Ω. FIGURE 5-6: Positive Voltage Multiplier. V OUT n – V + = CMOS GATE 1k VOUT “1” + V+ + 1 2 3 4 8 7 6 5 TC7660S 10 µF 10 µF V+ VOUT + + 1 2 3 4 8 7 6 5 TC7660S C1 C2 V+ COSC + C2 D1 D2 + C1 VOUT = 1 2 3 4 8 7 6 5 TC7660S V+ (2 V+) - (2 VF) |
유사한 부품 번호 - TC7660S_15 |
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유사한 설명 - TC7660S_15 |
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