MC100LVEL38DWR2G datasheet(5/7 Pages) ONSEMI

부품명	MC100LVEL38DWR2G

상세설명	3.3V ECL Clock Generation Chip

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MC100LVEL38

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Table 6. AC CHARACTERISTICS (VCC = 3.3 V; VEE = 0.0 V or VCC = 0.0 V; VEE = −3.3 V (Note 1))

Symbol

Characteristic

−40°C

25°C

85°C

Unit

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

fmax

Maximum Toggle Frequency (Figure 4)

Divide by 2

Divide by 4, Divide by 6

1.0

0.8

1.2

0.82

1.0

0.8

1.2

0.82

1.0

0.8

1.2

0.82

GHz

tPLH

tPHL

Propagation Delay to Output

CLK to Q (Differential)

CLK to Q (Single-Ended)

CLK to Phase_Out (Differential)

CLK to Phase_Out (Single-Ended)

MR to.Q

810

710

800

750

510

1010

1000

1050

810

850

750

840

790

540

1050

1040

1090

840

900

800

890

840

570

1100

1090

1140

870

ps

tSKEW

Within-Device Skew (Note 2)

Q0 − Q3

All

50

75

50

75

50

75

ps

Part-to-Part

Q0 − Q3 (Differential)

All

200

240

200

240

200

240

tS

Setup Time

EN to CLK

DIVSEL to CLK

150

ps

tH

Hold Time

CLK to EN

CLK to Div_Sel

150

200

150

200

150

200

ps

VPP

Input Swing (Note 3)

CLK

250

1000

250

1000

250

1000

mV

tRR

Reset Recovery Time

100

ps

tPW

Minimum Pulse Width

CLK

MR

800

700

800

700

800

700

ps

tr, tf

Output Rise/Fall Times Q (20% − 80%)

280

550

280

550

280

550

ps

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

1. VEE can vary ±0.3 V.

2. Skew is measured between outputs under identical transitions.

3. VPP (min) is minimum input swing for which AC parameters are guaranteed. The device will function reliably with differential inputs down

to 100 mV.

Figure 4. Fmax: Voutpp vs Input Frequency per DIV2/4/6

유사한 부품 번호 - MC100LVEL38DWR2G

제조업체	부품명	데이터시트	상세설명
ON Semiconductor	MC100LVEL38DWR2G	123Kb / 7P	3.3V ECL 첨2, 첨4/6 Clock Generation Chip November, 2006 ??Rev. 8

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유사한 설명 - MC100LVEL38DWR2G

제조업체	부품명	데이터시트	상세설명
ON Semiconductor	MC100LVEL34	99Kb / 9P	3.3V ECL Clock Generation Chip April, 2014 ??Rev. 4
	MC100LVEP34	106Kb / 11P	2.5V / 3.3V ECL Clock Generation Chip April, 2014 ??Rev. 11
	MC100LVEL34	145Kb / 10P	3.3V ECL 첨2, 첨4, 첨8 Clock Generation Chip November, 2006 ??Rev. 2
	MC100LVEL34	145Kb / 10P	3.3V ECL 첨2, 첨4, 첨8 Clock Generation Chip November, 2006 ??Rev. 2
	MC100LVEL38	123Kb / 7P	3.3V ECL 첨2, 첨4/6 Clock Generation Chip November, 2006 ??Rev. 8
	MC100LVEP34	164Kb / 12P	2.5V / 3.3V ECL /2, /4, /8 Clock Generation Chip February, 2005 ??Rev. 7
	MC100LVEL39	120Kb / 6P	3.3V ECL 첨2/4, 첨4/6 Clock Generation Chip November, 2006 ??Rev. 9
	MC100LVEP34	150Kb / 12P	2.5V / 3.3V ECL 첨2, 첨4, 첨8 Clock Generation Chip November, 2006 ??Rev. 9
	MC100EL39	159Kb / 7P	5 V ECL Clock Generation Chip July, 2016 ??Rev. 8
	MC100EL38	160Kb / 6P	5V ECL Clock Generation Chip July, 2016 ??Rev. 9

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유사한 부품 번호 - MC100LVEL38DWR2G

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