전자부품 데이터시트 검색엔진 |
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TC2320 데이터시트(PDF) 1 Page - Supertex, Inc |
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TC2320 데이터시트(HTML) 1 Page - Supertex, Inc |
1 / 4 page ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com TC2320 Features Low threshold Low on-resistance Low input capacitance Fast switching speeds Freedom from secondary breakdown Low input and output leakage Independent, electrically isolated N- and P-channels Applications Medical ultrasound transmitters High voltage pulsers Amplifiers Buffers Piezoelectric transducer drivers General purpose line drivers ► Logic level interface ► ► ► ► ► ► ► ► ► ► ► ► ► N- and P-Channel Enhancement-Mode Dual MOSFET General Description The Supertex TC2320 consists of a high voltage, low threshold N- and P-channel MOSFET in an 8-Lead SOIC package. This low threshold enhancement-mode (normally- off) transistor utilizes an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Ordering Information Device 8-Lead SOIC (Narrow Body) 4.90x3.90mm body, 1.75mm height (max) 1.27mm pitch BV DSS/BVDGS (V) R DS(ON) (max) (Ω) N-Channel P-Channel N-Channel P-Channel TC2320 TC2320TG-G 200 -200 7.0 12 -G indicates package is RoHS compliant (‘Green’) Absolute Maximum Ratings Parameter Value Drain-to-source voltage BV DSS Drain-to-gate voltage BV DGS Gate-to-source voltage ±20V Operating and storage temperature -55°C to +150°C Soldering temperature* +300°C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. * Distance of 1.6mm from case for 10 seconds. Pin Configuration Product Marking YY = Year Sealed WW = Week Sealed L = Lot Number = “Green” Packaging YYWW C2320 L L L L 8-Lead SOIC (TG) GP SP GN SN DP DP DN DN 8-Lead SOIC (TG) Package may or may not include the following marks: Si or |
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