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CDCLVP111-SP 데이터시트(PDF) 11 Page - Texas Instruments

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부품명 CDCLVP111-SP
상세설명  Low-Voltage 1:10 LVPECL With Selectable Input Clock Driver
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제조업체  TI1 [Texas Instruments]
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CDCLVP111-SP
www.ti.com
SCAS946 – NOVEMBER 2016
Product Folder Links: CDCLVP111-SP
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Copyright © 2016, Texas Instruments Incorporated
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The CDCLVP111-SP is a low-additive jitter LVPECL fanout buffer that can generate 5 copies of 2 selectable
LVDS, CML or SSTL inputs. The CDCLVP111-SP can accept reference clock frequencies up to 3.5 GHz while
providing low-output skew.
8.2 Typical Application
8.2.1 Fanout Buffer for Line Card Application
Figure 5. CDCLVP111-SP Block Diagram


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