전자부품 데이터시트 검색엔진 |
|
CDCLVP111-SP 데이터시트(PDF) 11 Page - Texas Instruments |
|
|
CDCLVP111-SP 데이터시트(HTML) 11 Page - Texas Instruments |
11 / 23 page 11 CDCLVP111-SP www.ti.com SCAS946 – NOVEMBER 2016 Product Folder Links: CDCLVP111-SP Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The CDCLVP111-SP is a low-additive jitter LVPECL fanout buffer that can generate 5 copies of 2 selectable LVDS, CML or SSTL inputs. The CDCLVP111-SP can accept reference clock frequencies up to 3.5 GHz while providing low-output skew. 8.2 Typical Application 8.2.1 Fanout Buffer for Line Card Application Figure 5. CDCLVP111-SP Block Diagram |
유사한 부품 번호 - CDCLVP111-SP |
|
유사한 설명 - CDCLVP111-SP |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |