CDCLVP111-EP datasheet(4/23 Pages) TI1

부품명	CDCLVP111-EP

상세설명	Low-Voltage 1:10 LVPECL With Selectable Input Clock Driver

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CDCLVP111-SP

SCAS946 – NOVEMBER 2016

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(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6 Specifications

6.1 Absolute Maximum Ratings

see

(1)

MIN

MAX

UNIT

VCC

Supply voltage (relative to VEE)

–0.3

4.6

V

VI

Input voltage

–0.3

VCC + 0.5

V

VO

Output voltage

–0.3

VCC + 0.5

V

IIN

Input current

±20

mA

VEE

Negative supply voltage (relative to VCC)

–4.6

0.3

V

IBB

Sink/source current

–1

1

mA

IO

DC output current

–50

mA

TJ

Maximum operating junction temperature

150

°C

Tstg

Storage temperature

–65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

V

Charged-device model (CDM), per JEDEC specification JESD22-C101(2)

±1000

6.3 Recommended Operating Conditions

MIN

NOM

MAX

UNIT

VCC

Supply voltage (relative to VEE)

2.375

2.5/3.3

3.8

V

TJ

Operating junction temperature

–55

125

°C

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(2)

According to JESD 51-7 standard.

6.4 Thermal Information

THERMAL METRIC(1)

CDCLVP111-SP

UNIT

HFG (CFP)

36 PINS

RθJA

Junction-to-ambient thermal resistance(2)

107.2

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

33.2

°C/W

RθJB

Junction-to-board thermal resistance

98.9

°C/W

ψJT

Junction-to-top characterization parameter

29.2

°C/W

ψJB

Junction-to-board characterization parameter

91.36

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

13.4

°C/W

유사한 부품 번호 - CDCLVP111-EP

제조업체	부품명	데이터시트	상세설명
Texas Instruments	CDCLVP111-EP	743Kb / 15P	[Old version datasheet] LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER

More results

유사한 설명 - CDCLVP111-EP

제조업체	부품명	데이터시트	상세설명
Texas Instruments	CDCLVP111-EP	743Kb / 15P	[Old version datasheet] LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER
	CDCLVP111	1Mb / 29P	[Old version datasheet] Low-Voltage 1:10 LVPECL With Selectable Input Clock Driver
	CDCLVP111	619Kb / 15P	[Old version datasheet] LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER
	CDCLVP110	136Kb / 11P	[Old version datasheet] LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER
	CDCLVP110	675Kb / 14P	[Old version datasheet] Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver
Cypress Semiconductor	CY2DP1510	303Kb / 13P	1:10 LVPECL Fanout Buffer with Selectable Clock Input
	CY2DP1504	301Kb / 14P	1:4 LVPECL Fanout Buffer with Selectable Clock Input
	CY2CP1504	298Kb / 13P	1:4 LVCMOS to LVPECL Fanout Buffer with Selectable Clock Input
ON Semiconductor	MC100LVEP111	131Kb / 8P	Low-Voltage 1:10 Differential LVECL/LVPECL/LVEPECL/HSTL Clock Driver December, 2008 ??Rev. 17
Cypress Semiconductor	CY2DL15110	430Kb / 13P	1:10 Differential LVDS Fanout Buffer with Selectable Clock Input

More results

CDCLVP111-EP 데이터시트(PDF) 4 Page - Texas Instruments

CDCLVP111-EP 데이터시트(HTML) 4 Page - Texas Instruments

유사한 부품 번호 - CDCLVP111-EP

유사한 설명 - CDCLVP111-EP

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