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BU4030BF-E2 데이터시트(PDF) 9 Page - Rohm

부품명 BU4030BF-E2
상세설명  Quad 2-Input Exclusive-OR Gate
Download  16 Pages
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제조업체  ROHM [Rohm]
홈페이지  http://www.rohm.com
Logo ROHM - Rohm

BU4030BF-E2 데이터시트(HTML) 9 Page - Rohm

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Datasheet
Datasheet
9/12
BU4030B
BU4030BF
TSZ02201-0RDR1GZ00040-1-2
© 2013 ROHM Co., Ltd. All rights reserved.
09.Aug.2013 Rev.001
www.rohm.com
TSZ22111・15・001
Operational Notes - continued
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Pins
Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance
and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
12. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation
of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage.
Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower
than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input terminals when no power
supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have
voltages within the values specified in the electrical characteristics of this IC.
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
Ordering Information
B
U
4
0
3
0
B
x
-
E 2
Part Number.
Package
None : DIP14
F
: SOP14
Packaging and forming specification
None : Tube
E2
: Embossed tape and reel
Marking Diagrams
SOP14(TOP VIEW)
BU4030 BF
Part Number Marking
LOT Number
1PIN MARK
DIP14 (TOP VIEW)
BU4030 B
Part Number Marking
LOT Number


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