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CAT24C32LI.G 데이터시트(PDF) 3 Page - ON Semiconductor |
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3 / 16 page CAT24C32 www.onsemi.com 3 Table 1. ABSOLUTE MAXIMUM RATINGS Parameters Ratings Units Storage Temperature –65 to +150 °C Voltage on any Pin with Respect to Ground (Note 1) –0.5 to +6.5 V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. The DC input voltage on any pin should not be lower than −0.5 V or higher than VCC + 0.5 V. During transitions, the voltage on any pin may undershoot to no less than −1.5 V or overshoot to no more than VCC + 1.5 V, for periods of less than 20 ns. Table 2. RELIABILITY CHARACTERISTICS (Note 2) Symbol Parameter Min Units NEND (Note 3) Endurance 1,000,000 Program/Erase Cycles TDR Data Retention 100 Years 2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100 and JEDEC test methods. 3. Page Mode, VCC = 5 V, 25°C. Table 3. D.C. OPERATING CHARACTERISTICS (VCC = 1.8 V to 5.5 V, TA = −40°C to +125°C and VCC = 1.7 V to 5.5 V, TA = −40°C to +85°C, unless otherwise specified.) Symbol Parameter Test Conditions Min Max Units ICCR Read Current Read, fSCL = 400 kHz 1 mA ICCW Write Current Write, fSCL = 400 kHz 2 mA ISB Standby Current All I/O Pins at GND or VCC TA = −40°C to +85°C VCC ≤ 3.3 V 1 mA TA = −40°C to +85°C VCC > 3.3 V 3 TA = −40°C to +125°C 5 IL I/O Pin Leakage Pin at GND or VCC 2 mA VIL Input Low Voltage −0.5 VCC x 0.3 V VIH Input High Voltage SCL, SDA Inputs VCC x 0.7 6.5 V WP, A0, A1, A2 Inputs VCC x 0.7 VCC + 0.5 VOL1 Output Low Voltage VCC ≥ 2.5 V, IOL = 3.0 mA 0.4 V VOL2 Output Low Voltage VCC < 2.5 V, IOL = 1.0 mA 0.2 V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. Table 4. PIN IMPEDANCE CHARACTERISTICS (VCC = 1.8 V to 5.5 V, TA = −40°C to +125°C and VCC = 1.7 V to 5.5 V, TA = −40°C to +85°C, unless otherwise specified.) Symbol Parameter Conditions Max Units CIN (Note 4) SDA I/O Pin Capacitance VIN = 0 V, TA = 25°C, f = 1.0 MHz 8 pF CIN (Note 4) Input Capacitance (other pins) VIN = 0 V, TA = 25°C, f = 1.0 MHz 6 pF IWP (Note 5) WP Input Current VIN < VIH, VCC = 5.5 V 130 mA VIN < VIH, VCC = 3.3 V 120 VIN < VIH, VCC = 1.7 V 80 VIN > VIH 2 IA (Note 5) Address Input Current (A0, A1, A2) Product Rev F VIN < VIH, VCC = 5.5 V 50 mA VIN < VIH, VCC = 3.3 V 35 VIN < VIH, VCC = 1.7 V 25 VIN > VIH 2 4. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100 and JEDEC test methods. 5. When not driven, the WP, A0, A1 and A2 pins are pulled down to GND internally. For improved noise immunity, the internal pull−down is relatively strong; therefore the external driver must be able to supply the pull−down current when attempting to drive the input HIGH. To conserve power, as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x VCC), the strong pull−down reverts to a weak current source. |
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