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9ZXL0831AKLF 데이터시트(PDF) 7 Page - Integrated Device Technology |
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9ZXL0831AKLF 데이터시트(HTML) 7 Page - Integrated Device Technology |
7 / 18 page 9ZXL0831 8-OUTPUT DB800ZL IDT® 8-OUTPUT DB800ZL 7 9ZXL0831 REV E 081616 Electrical Characteristics–DIF 0.7V Low Power Differential Outputs Electrical Characteristics–Current Consumption TA = TCOM; Supply Voltage VDD = 3.3 V +/-5% PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES Slew rate Trf Scope averaging on 2 3.3 4 V/ns 1, 2, 3 Slew rate matching ∆Trf Slew rate matching, Scope averaging on 6.8 20 % 1, 2, 4 Voltage High VHigh 660 778 850 1 Voltage Low VLow -150 0 150 1 Max Voltage Vmax 918 1150 1 Min Voltage Vmin -300 -71 1 Vswing Vswing Scope averaging off 300 1556 1812 mV 1, 2 Crossing Voltage (abs) Vcross_abs Scope averaging off 300 458 550 mV 1, 5 Crossing Voltage (var) ∆-Vcross Scope averaging off 17 140 mV 1, 6 2 Measured from differential waveform 6 The total variation of all Vcross measurements in any particular system. Note that this is a subset of Vcross_min/max (Vcross absolute) allowed. The intent is to limit Vcross induced modulation by setting ∆-Vcross to be smaller than Vcross absolute. mV Statistical measurement on single-ended signal using oscilloscope math function. (Scope averaging on) Measurement on single ended signal using absolute value. (Scope averaging off) mV 1Guaranteed by design and characterization, not 100% tested in production. C L = 2pF with RS = 27Ω for Zo = 85Ω differential trace impedance). 3 Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around differential 0V. 4 Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on the average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the oscilloscope is to use for the edge rate calculations. 5 Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising edge (i.e. Clock rising and Clock# falling). TA = TCOM; Supply Voltage VDD = 3.3 V +/-5% PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES IDDVDD 133MHz, VDD rail 59 75 mA 1 IDDVDDA 133MHz, VDDA + VDDR rail, PLL Mode 19 25 mA 1 IDDVDDPD Power Down, VDD Rail 1.2 2mA 1 IDDVDDAPD Power Down, VDDA Rail 2.5 5mA 1 1Guaranteed by design and characterization, not 100% tested in production. 2 C L = 2pF with RS = 27Ω for Zo = 85Ω differential trace impedance Operating Current Powerdown Current |
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