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MC74AC157DR2G 데이터시트(PDF) 2 Page - ON Semiconductor |
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2 / 9 page MC74AC157, MC74ACT157 www.onsemi.com 2 Figure 2. Logic Symbol S EI0a I1a I0b I1b Zb I0c I1c I0d I1d Za Zc Zd FUNCTIONAL DESCRIPTION The MC74AC157/74ACT157 is a quad 2−input multiplexer. It selects four bits of data from two sources under the control of a common Select input (S). The Enable input (E) is active−LOW. When E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs. The MC74AC157/74ACT157 is the logic implementation of a 4−pole, 2−position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: Za = E•(I1a•S+I0a•S) Zb = E•(I1b•S+I0b•S) Zc = E•(I1c•S+I0c•S) Zd = E•(I1d•S+I0d•S) A common use of the MC74AC157/74ACT157 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The MC74AC157/74ACT157 can generate any four of the sixteen different functions of two variables with one variable common. This is useful for implementing gating functions. Figure 3. Logic Diagram I0a I1a I0b I1b I0c I1c I0d I1d E S Za NOTE: This diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Zb Zc Zd |
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