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SST25PF040B-80-4C-QAE-T 데이터시트(PDF) 8 Page - Microchip Technology

부품명 SST25PF040B-80-4C-QAE-T
상세설명  4 Mbit 2.3-3.6V SPI Serial Flash
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

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SST25PF040B
DS20005134B-page 8
 2014 Microchip Technology Inc.
4.4.1
READ (33/25 MHZ)
The Read instruction, 03H, supports up to up to 33
MHz (2.7-3.6V operation) or 25 MHz (2.3-2.7V opera-
tion) Read. The device outputs the data starting from
the specified address location. The data output stream
is continuous through all addresses until terminated by
a low to high transition on CE#. The internal address
pointer will automatically increment until the highest
memory address is reached. Once the highest memory
address is reached, the address pointer will automati-
cally increment to the beginning (wrap-around) of the
address space. Once the data from address location
1FFFFFH has been read, the next output will be from
address location 000000H.
The Read instruction is initiated by executing an 8-bit
command, 03H, followed by address bits [A23-A0]. CE#
must remain active low for the duration of the Read
cycle. See Figure 4-3 for the Read sequence.
FIGURE 4-3:
READ SEQUENCE
4.4.2
HIGH-SPEED-READ (80/50 MHZ)
The High-Speed-Read instruction, supporting up to 80
MHz (2.7-3.6V operation) or 50 MHz (2.3-2.7V opera-
tion) Read, is initiated by executing an 8-bit command,
0BH, followed by address bits [A23-A0] and a dummy
byte. CE# must remain active low for the duration of the
High-Speed-Read cycle. See Figure 4-4 for the High-
Speed-Read sequence.
Following a dummy cycle, the High-Speed-Read
instruction outputs the data starting from the specified
address location. The data output stream is continuous
through all addresses until terminated by a low to high
transition on CE#. The internal address pointer will
automatically increment until the highest memory
address is reached. Once the highest memory address
is reached, the address pointer will automatically incre-
ment to the beginning (wrap-around) of the address
space. Once the data from address location 7FFFFH
has been read, the next output will be from address
location 00000H.
FIGURE 4-4:
HIGH-SPEED-READ SEQUENCE
25134 ReadSeq.0
CE#
SO
SI
SCK
ADD.
01 2 3 4 5 6 7 8
ADD.
ADD.
03
HIGH IMPEDANCE
15 16
23 24
31 32
39 40
70
47
48
55 56
63 64
N+2
N+3
N+4
N
N+1
DOUT
MSB
MSB
MSB
MODE 0
MODE 3
DOUT
DOUT
DOUT
DOUT
25134 HSRdSeq.0
CE#
SO
SI
SCK
ADD.
012 34 5
6 7 8
ADD.
ADD.
0B
HIGH IMPEDANCE
15 16
23 24
31 32
39 40
47 48
55 56
63 64
N+2
N+3
N+4
N
N+1
X
MSB
MSB
MSB
MODE 0
MODE 3
DOUT
DOUT
DOUT
DOUT
80
71 72
DOUT


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