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ISL58327CIZ-T7A 데이터시트(PDF) 11 Page - Intersil Corporation |
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ISL58327CIZ-T7A 데이터시트(HTML) 11 Page - Intersil Corporation |
11 / 15 page ISL58327 11 FN6577.2 July 29, 2013 Register Description TABLE 3. ID0 (addr = 00h) REGISTER DESCRIPTION ID0 Device ID, read only, code = 27h TABLE 4. ID1 (addr = 01h) REGISTER DESCRIPTION DEVICE OPTION Device option code, read only, code = E0h DEVICE VERSION Device version code, read only, code = 0h TABLE 5. CONTROL (addr = 10h) REGISTER DESCRIPTION h/l HIGH gain or LOW Gain channels selection. Used in conjunction with HL pin. 1b: HIGH Gain channel 0b: LOW Gain channel Default: 0b deglitch_b 1b: Disable serial interface deglitch function 0b: Enable serial interface deglitch function Default: 0b blue 1b: Device works in blue mode (regardless of red/green bit setting) 0b: Device works in either RED or GREEN mode, depends on red/green register bit setting Default: 0b red/green 0b: GREEN 1b: RED Default: 0b (GREEN mode) test_en To enable a chip test function (for Intersil internal use only) 1b: Enable test function 0b: Disable test function Default: 0b chip_en To enable or disable ISL58327. When disabled all outputs are in Hi-Z 1b: enable 0b: disable (SLEEP mode) TABLE 6. B_GAIN0 (addr = 11h) REGISTER DESCRIPTION blue_h[3: 0] Lower 4 bits of blue light HIGH Gain channel fine gain control blue_l[3: 0] Lower 4 bits of blue light LOW Gain channel fine gain control TABLE 7. B_H_GAIN (addr = 12h) REGISTER DESCRIPTION blue_h[11:4] High 8 bits of blue light HIGH Gain channel fine gain control TABLE 8. B_L_GAIN (addr = 13h) REGISTER DESCRIPTION blue_l[11:4] High 8 bits of blue light LOW Gain channel fine gain control TABLE 9. RED_GAIN0 (addr = 14h) REGISTER DESCRIPTION red_h[3: 0] Lower 4 bits of red light HIGH Gain channel fine gain control red_l[3: 0] Lower 4 bits of red light LOW Gain channel fine gain control TABLE 10. RED_H_GAIN (addr = 15h) REGISTER DESCRIPTION red_h[11:4] High 8 bits of red light HIGH Gain channel fine gain control TABLE 11. RED_L_GAIN (addr = 16h) REGISTER DESCRIPTION red_l[11:4] High 8 bits of red light LOW Gain channel fine gain control TABLE 12. GREEN_GAIN0 (addr = 17h) REGISTER DESCRIPTION green_h[3:0] Lower 4 bits of green light HIGH Gain channel fine gain control green_l[3:0] Lower 4 bits of green light LOW Gain channel fine gain control TABLE 13. GREEN_H_GAIN (addr = 18h) REGISTER DESCRIPTION green_h[11:4] High 8 bits of green light HIGH Gain channel fine gain control TABLE 14. GREEN_L_GAIN (addr = 19h) REGISTER DESCRIPTION green_l[11:4] High 8 bits of green light LOW Gain channel fine gain control TABLE 15. ST_RED (addr = 1Ah) REGISTER DESCRIPTION st_en_red Red light slow tail compensation control 1b: enable 0b: disable (when disable, st_time_red and st_mag_red are reset to 000b) st_time_red Red light slow tail compensation time constant control st_mag_red Red light slow tail compensation magnitude control |
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