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AD8250-EVALZ 데이터시트(PDF) 7 Page - Analog Devices |
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AD8250-EVALZ 데이터시트(HTML) 7 Page - Analog Devices |
7 / 25 page AD8250 Data Sheet Rev. C | Page 6 of 24 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage ±17 V Power Dissipation See Figure 4 Output Short-Circuit Current Indefinite1 Common-Mode Input Voltage +VS + 13 V, −VS − 13 V Differential Input Voltage +VS + 13 V, −VS − 13 V2 Digital Logic Inputs ±VS Storage Temperature Range −65°C to +125°C Operating Temperature Range3 −40°C to +85°C Lead Temperature (Soldering, 10 sec) 300°C Junction Temperature 140°C θJA (Four-Layer JEDEC Standard Board) 112°C/W Package Glass Transition Temperature 140°C 1 Assumes that the load is referenced to midsupply. 2 Current must be kept to less than 6 mA. 3 Temperature for specified performance is −40°C to +85°C. For performance to 125°C, see the Typical Performance Characteristics section. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. MAXIMUM POWER DISSIPATION The maximum safe power dissipation in the AD8250 package is limited by the associated rise in junction temperature (TJ) on the die. The plastic encapsulating the die locally reaches the junction temperature. At approximately 140°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8250. Exceeding a junction temperature of 140°C for an extended period can result in changes in silicon devices, potentially causing failure. The still-air thermal properties of the package and PCB (θJA), the ambient temperature (TA), and the total power dissipated in the package (PD) determine the junction temperature of the die. The junction temperature is calculated as TJ = TA + (PD × θJA) The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). Assuming that the load (RL) is referenced to midsupply, the total drive power is VS/2 × IOUT, some of which is dissipated in the package and some in the load (VOUT × IOUT). The difference between the total drive power and the load power is the drive power dissipated in the package. PD = Quiescent Power + (Total Drive Power − Load Power) ( ) L OUT L OUT S S S D R V R V V I V P 2 – 2 × + × = In single-supply operation with RL referenced to −VS, the worst case is VOUT = VS/2. Airflow increases heat dissipation, effectively reducing θJA. In addition, more metal directly in contact with the package leads from metal traces, through holes, ground, and power planes reduces the θJA. Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature on a four-layer JEDEC standard board. 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0 –40 –20 120 100 80 60 40 20 0 AMBIENT TEMPERATURE (°C) Figure 4. Maximum Power Dissipation vs. Ambient Temperature ESD CAUTION |
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