ZSPM4521 Datasheet

© 2016 Integrated Device Technology, Inc.

27

January 27, 2016

5

Layout Recommendations

To maximize the efficiency of this package for application on a single layer or multi-layer PCB, certain guidelines

must be followed when laying out this part on the PCB.

5.1.

Multi-Layer PCB Layout

The following are guidelines for mounting the exposed pad ZSPM4521 on a multi-layer PCB with ground a plane.

In a multi-layer board application, the thermal vias are the primary method of heat transfer from the package

thermal pad to the internal ground plane. The efficiency of this method depends on several factors, including die

area, number of thermal vias, and thickness of copper, etc.

Figure 5.1

Package and PCB Land Configuration for Multi-Layer PCB

Package Thermal Pad

Solder Pad (Land Pattern)

Thermal Vias

Package Outline

Figure 5.2

JEDEC Standard FR4 Multi-Layer Board – Cross-Sectional View

(square)

Package Solder

Pad

Package Solder

Pad (bottom trace)

Thermal Via

Component Traces

Thermal Isolation

Power plane only

1.5748mm

0.0 - 0.071 mm Board

Base & Bottom Pad

0.5246 - 0.5606 mm

Power Plane

(1oz Cu)

1.0142 - 1.0502 mm

Ground Plane

(1oz Cu)

1.5038 - 1.5748 mm

Component Trace

(2oz Cu)

2 Plane

4 Plane