전자부품 데이터시트 검색엔진 |
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AD5593RBRUZ 데이터시트(PDF) 9 Page - Analog Devices |
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AD5593RBRUZ 데이터시트(HTML) 9 Page - Analog Devices |
9 / 34 page AD5593R Data Sheet Rev. B | Page 8 of 33 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 A0 VDD I/O0 I/O3 I/O2 I/O1 RESET SDA GND I/O7 I/O4 VREF VLOGIC I/O5 I/O6 SCL AD5593R TOP VIEW (Not to Scale) Figure 3. 16-Lead TSSOP Pin Configuration Table 6. 16-Lead TSSOP Pin Function Descriptions Pin No. Mnemonic Description 1 RESET Asynchronous Reset Pin. Tie this pin high for normal operation. When this pin is brought low, the AD5593R is reset to its default configuration. 2 A0 Address Input. Sets the LSB of the 7-bit slave address. 3 VDD Power Supply Input. The AD5593R can operate from 2.7 V to 5.5 V. Decouple the supply with a 0.1 μF capacitor to GND. 4 to 7, 10 to 13 I/O0 to I/O7 Input/Output 0 Through Input/Output 7. These pins can be independently configured as DACs, ADCs, or general- purpose digital inputs or outputs. The function of each pin is determined by programming the appropriate bits in the configuration registers. 8 VREF Reference Input/Output. When the internal reference is enabled, the 2.5 V reference voltage is available on the VREF pin. A 0.1 μF capacitor connected from the VREF pin to GND is recommended to achieve the specified performance from the AD5593R. When the internal reference is disabled, an external reference must be applied to this pin. The voltage range for the external reference is 1 V to VDD. 9 VLOGIC Interface Power Supply. The voltage on this pin ranges from 1.8 V to 5.5 V. 14 GND Ground Reference Point for All Circuitry. 15 SDA Serial Data Input. This pin is used in conjunction with the SCL line to clock data in to or out of the input shift register. SDA is a bidirectional, open-drain line that must be pulled to the VLOGIC supply with an external pull-up resistor. 16 SCL Serial Clock Line. This pin is used in conjunction with the SDA line to clock data in to or out of the 16-bit input register. |
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