Differential Input, Dual 1 MSPS,

12-Bit, 3-Channel SAR ADC

Preliminary Technical Data

AD7265

FEATURES

Dual 12-bit, 3-channel ADC

Fast throughput rate: 1 MSPS

Low power: 7 mW max at 1 MSPS with 3 V supplies

16.5 mW max at 1 MSPS with 5 V supplies

Wide input bandwidth

70 dB SNR at 100 kHz input frequency

On-chip reference: 2.5 V

–40°C to +125°C operation

Flexible power/throughput rate management

Simultaneous conversion/read

No pipeline delays

High speed serial interface SPI®/QSPI™/MICROWIRE™/DSP

compatible

Shutdown mode: 1 µA max

32-lead LFCSP and TQFP packages

GENERAL DESCRIPTION

The AD7265 is a dual, 12-bit, high speed, low power, successive

approximation ADC that operates from a single 2.7 V to 5.25 V

power supply and features throughput rates up to 1 MSPS. The

device contains two ADCs, each preceded by a 3-channel multi-

plexer, and a low noise, wide bandwidth track-and-hold amplifier

that can handle input frequencies in excess of 10 MHz.

The conversion process and data acquisition are controlled using

standard control inputs, allowing easy interfacing to microproces-

sors or DSPs. The input signal is sampled on the falling edge of CS;

conversion is also initiated at this point. The conversion time is

determined by the SCLK frequency. There are no pipelined delays

associated with the part.

The AD7265 uses advanced design techniques to achieve very low

power dissipation at high throughput rates. With 5 V supplies and a

1 MSPS throughput rate, the part consumes ? mA maximum. The

part also offers flexible power/throughput rate management when

operating in sleep mode.

The analog input range for the part can be selected to be a 0 V to

complement output coding. The AD7265 has an on-chip 2.5 V

reference that can be overdriven if an external reference is pre-

ferred. This external reference range is 100 mV to 2.5 V. The

AD7265 is available in 32-lead lead frame chip scale (LFCSP) and

thin flat quad (TQFP) lead package.

FUNCTIONAL BLOCK DIAGRAM

OUTPUT

DRIVERS

AGND

DGND

V

B1

VA1

+5

AVdd

DVdd

REF SELECT

DcapA

DcapB

DOUTA

SCLK

DOUTB

AD7265

T/H

OUTPUT

DRIVERS

CONTROL

LOGIC

12-BIT

SUCCESSIVE

APPROXIMATION

ADC

12-BIT

SUCCESSIVE

APPROXIMATION

ADC

T/H

VA2

MUX

V

B2

MUX

VDRIVE

RANGE

AGND

REF

BUF

BUF

VA3

VA4

V

B3

V

B4

DGND

AGND

VA5

VA6

V

B5

V

B6

DIFF/SE

A0

A1

A2

Figure 1

PRODUCT HIGHLIGHTS

1.

The AD7265 features two complete ADC functions that allow

simultaneous sampling and conversion of two channels. Each

ADC has 2 analog inputs, 3 fully differential pairs, or 6 single-

ended channels as programmed. The conversion result of both

channels is available simultaneously on separate data lines, or

in succession on one data line if only one serial port is

available.

2.

High Throughput with Low Power Consumption

The AD7265 offers a 1 MSPS throughput rate with ? mW

maximum power consumption when operating at 3 V.

3.

Flexible Power/Throughput Rate Management

The conversion rate is determined by the serial clock, allowing

power consumption to be reduced as conversion time is re-

duced through an SCLK frequency increase. Power efficiency

can be maximized at lower throughput rates if the part enters

sleep between conversions.

4.

No Pipeline Delay

The part features two standard successive approximation

ADCs with accurate control of the sampling instant via a CS

input and once off conversion control.

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However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

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Tel: 781.329.4700

www.analog.com

Fax: 781.326.8703

© 2004 Analog Devices, Inc. All rights reserved.

Rev. PrA