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LSM330D 데이터시트(PDF) 62 Page - STMicroelectronics |
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LSM330D 데이터시트(HTML) 62 Page - STMicroelectronics |
62 / 66 page Register descriptions LSM330D 62/66 Doc ID 022562 Rev 2 D6 - D0 bits set the minimum duration of the interrupt event to be recognized. Duration steps and maximum values depend on the ODR chosen. WAIT bit has the following meaning: Wait =’0’: the interrupt falls immediately if signal crosses the selected threshold Wait =’1’: if the signal crosses the selected threshold, the interrupt falls only after the duration has counted the number of samples at the selected data rate, written into the duration counter register. Figure 21. Wait disabled Table 110. INT1_DURATION_G description WAIT WAIT enable. Default value: 0 (0: disable; 1: enable) D6 - D0 Duration value. Default value: 000 0000 |
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