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CDCM1804RGER 데이터시트(PDF) 6 Page - Texas Instruments

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부품명 CDCM1804RGER
상세설명  1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER
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제조업체  TI1 [Texas Instruments]
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CDCM1804RGER 데이터시트(HTML) 6 Page - Texas Instruments

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RECOMMENDED OPERATING CONDITIONS
ELECTRICAL CHARACTERISTICS
LVPECL INPUT IN, IN
LVPECL OUTPUT DRIVER Y[2:0], Y[2:0]
LVPECL INPUT-TO-LVPECL OUTPUT PARAMETERS
CDCM1804
SCAS697E – JULY 2003 – REVISED MAY 2005
MIN
TYP
MAX
UNIT
VDD
Supply voltage
3
3.3
3.6
V
TA
Operating free-air temperature
–40
85
°C
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
fclk
Input frequency
0
800
MHz
VCM
High-level input common mode
1
VDD – 0.3
V
Input voltage swing between IN and IN(1)
500
1300
VIN
mV
Input voltage swing between IN and IN(2)
150
1300
IIN
Input current
VI = VDD or 0 V
±10
µA
RIN
Input impedance
300
k
CI
Input capacitance at IN, IN
1
pF
(1)
Is required to maintain ac specifications
(2)
Is required to maintain device functionality
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
fclk
Output frequency, see Figure 4
0
800
MHz
VOH
High-level output voltage
Termination with 50
Ω to V
DD – 2 V
VDD – 1.18
VDD – 0.81
V
VOL
Low-level output voltage
Termination with 50
Ω to V
DD – 2 V
VDD – 1.98
VDD – 1.55
V
Output voltage swing between Y and
VO
Termination with 50
Ω to V
DD – 2 V
500
mV
Y, see Figure 4.
IOZL
VDD = 3.6 V, VO = 0 V
5
Output 3-state current
µA
IOZH
VDD = 3.6 V, VO = VDD – 0.8 V
10
20% to 80% of VOUTPP, see Fig-
tr/tf
Rise and fall time
200
350
ps
ure 9.
Output skew between any LVPECL
tskpecl(o)
See Note A in Figure 8.
15
30
ps
output Y[2-0] and Y[2-0]
Crossing point-to-crossing point dis-
tDuty
Output duty-cycle distortion(1)
–50
50
ps
tortion
tsk(pp)
Part-to-part skew
Any Y, see Note B in Figure 8.
50
ps
CO
Output capacitance
VO = VDD or GND
1
pF
LOAD
Expected output load
50
(1)
For an 800-MHz signal, the 50-ps error would result in a duty-cycle distortion of
±4% when driven by an ideal clock input signal.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
LVPECL INPUT-TO-LVPECL OUTPUT PARAMETER
tpd(lh)
Propagation delay rising edge
VOX to VOX
320
600
ps
tpd(hl)
Propagation delay falling edge
VOX to VOX
320
600
ps
tsk(p)
LVPECL pulse skew
VOX to VOX, see Note C in Fig-
100
ps
ure 8.
6


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