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L6599ATDTR 데이터시트(PDF) 6 Page - STMicroelectronics

부품명 L6599ATDTR
상세설명  Improved high voltage resonant controller
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Pin connection
L6599AT
6/32
DocID15534 Rev 7
5STBY
Burst mode operation threshold. The pin senses some voltage related to the feedback
control, which is compared to an internal reference (1.24 V). If the voltage on the pin is lower
than the reference, the IC enters an idle state and its quiescent current is reduced. The chip
restarts switching as the voltage exceeds the reference by 50 mV. Soft-start is not invoked.
This function realizes burst mode operation when the load falls below a level that can be
programmed by properly choosing the resistor connecting the optocoupler to pin RFmin
(see block diagram). Tie the pin to RFmin if burst mode is not used.
6ISEN
Current sense input. The pin senses the primary current though a sense resistor or a
capacitive divider for lossless sensing. This input is not intended for a cycle-by-cycle control;
therefore the voltage signal must be filtered to get average current information. As the
voltage exceeds a 0.8 V threshold (with 50 mV hysteresis), the soft-start capacitor
connected to pin 1 is internally discharged: the frequency increases, so limiting the power
throughput. Under output short-circuit, this normally results in a nearly constant peak
primary current. This condition is allowed for a maximum time set at pin 2. If the current
keeps on building up despite this frequency increase, a second comparator referenced at
1.5 V latches the device off and brings its consumption almost to a “before startup” level.
The information is latched and it is necessary to recycle the supply voltage of the IC to
enable it to restart: the latch is removed as the voltage on the Vcc pin goes below the UVLO
threshold. Tie the pin to GND if the function is not used.
7LINE
Line sensing input. The pin is to be connected to the high voltage input bus with a resistor
divider to perform either AC or DC (in systems with PFC) brownout protection. A voltage
below 1.24 V shuts down (not latched) the IC, lowers its consumption and discharges the
soft-start capacitor. IC operation is re-enabled (soft-started) as the voltage exceeds 1.24 V.
The comparator is provided with current hysteresis: an internal 13 µA current generator is
ON as long as the voltage applied at the pin is below 1.24 V and is OFF if this value is
exceeded. Bypass the pin with a capacitor to GND to reduce noise pick-up. The voltage on
the pin is top-limited by an internal Zener diode. Activating the Zener diode causes the IC to
shut down (not latched). Bias the pin between 1.24 and 6 V if the function is not used.
8DIS
Latched device shutdown. Internally, the pin connects a comparator that, when the voltage
on the pin exceeds 1.85 V, shuts the IC down and brings its consumption almost to a “before
startup” level. The information is latched and it is necessary to recycle the supply voltage of
the IC to enable it to restart: the latch is removed as the voltage on the VCC pin goes below
the UVLO threshold. Tie the pin to GND if the function is not used.
9PFC_STOP
Open-drain ON/OFF control of PFC controller. This pin, normally open, is intended for
stopping the PFC controller, for protection purposes or during burst mode operation. It goes
low when the IC is shut down by DIS>1.85 V, ISEN > 1.5 V, LINE > 6 V and STBY < 1.24 V.
The pin is pulled low also when the voltage on the DELAY exceeds 2 V and goes back open
as the voltage falls below 0.3 V. During UVLO, it is open. Leave the pin unconnected if not
used.
10
GND
Chip ground. Current return for both the low-side gate-drive current and the bias current of
the IC. All of the ground connections of the bias components should be tied to a track going
to this pin and kept separate from any pulsed current return.
11
LVG
Low-side gate-drive output. The driver is capable of 0.3 A min. source and 0.7 A min. sink
peak current to drive the lower MOSFET of the half bridge leg. The pin is actively pulled to
GND during UVLO.
12
Vcc
Supply voltage of both the signal part of the IC and the low-side gate driver. Sometimes
a small bypass capacitor (0.1 µF typ.) to GND may be useful to get a clean bias voltage for
the signal part of the IC.
Table 2. Pin description (continued)
Pin no.
Type
Function


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