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Functional Description

The 74ALVCH16374 consists of sixteen edge-triggered

flip-flops with individual D-type inputs and 3-STATE true

outputs. The device is byte controlled with each byte func-

tioning identically, but independent of the other. The control

pins can be shorted together to obtain full 16-bit operation.

Each clock has a buffered clock and buffered Output

Enable common to all flip-flops within that byte. The

description which follows applies to each byte. Each

flip-flop will store the state of their individual I inputs that

meet the setup and hold time requirements on the

does not affect the state of the flip-flops.

Logic Diagram

Byte 1 (0:7)

Byte 2 (8:15)

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.