전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

AM79C875 데이터시트(PDF) 11 Page - Advanced Micro Devices

부품명 AM79C875
상세설명  NetPHY??4LP Low Power Quad 10/100-TX/FX Ethernet Transceiver
Download  48 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  AMD [Advanced Micro Devices]
홈페이지  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C875 데이터시트(HTML) 11 Page - Advanced Micro Devices

Back Button AM79C875 Datasheet HTML 7Page - Advanced Micro Devices AM79C875 Datasheet HTML 8Page - Advanced Micro Devices AM79C875 Datasheet HTML 9Page - Advanced Micro Devices AM79C875 Datasheet HTML 10Page - Advanced Micro Devices AM79C875 Datasheet HTML 11Page - Advanced Micro Devices AM79C875 Datasheet HTML 12Page - Advanced Micro Devices AM79C875 Datasheet HTML 13Page - Advanced Micro Devices AM79C875 Datasheet HTML 14Page - Advanced Micro Devices AM79C875 Datasheet HTML 15Page - Advanced Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 11 / 48 page
background image
Am79C875
11
MDIO
Management Data I/O
Input/Output, Pull-Down
This pin is a bidirectional data interface used by the
MAC to access management register within the Net-
PHY™ 4LP device. This pin has an internal pull-down,
therefore, it requires an external pull-up resistor (1.5
K
Ω) as specified in IEEE-802.3 section 22.
MDC
Management Data Clock
Input, Pull-Down
This pin is the serial management clock which is used
to clock MDIO data to the MAC.
RST
Reset
Input, Pull-Up
An active low input will force the NetPHY™ 4LP device
to a known reset state. Reset also can be done through
the internal power-on-reset or MII Register 0, bit 15.
INTR
Interrupt
Tri-State
This pin is true whenever the NetPHY™ 4LP device
detects an event flagged as an interrupt. Events to be
flagged are programmed in Register 17. Interrupts are
cleared on Read. The polarity of INTR (active HIGH or
active LOW) is set by Register 16, bit 14. The default is
active LOW, which requires a 10 K
Ω pull-up resistor.
LED Port
Note: Consult the LED Port Configuration section for
appropriate pull-up and pull-down resistors.
LEDDPX[0]/FX_DIS
Port [0] Duplex LED
Input/Output, Pull-Up
Low LED indicates full-duplex and high indicates half-
duplex.
FX Mode: Pulled low at reset will put Port 3 in
100BASE-FX mode.
LEDACT_LINK[0]
Port [0] Transmit/Receive Activity LED
Output, Pull-Up
LED is output low for approximately 30 ms each time
there is activity. LINK is an active low signal. This signal
should have a 1k–4.7K
Ω pull-up resistor.
LEDSPD[0]/TP1_1
Port [0] Speed LED
Input/Output, Pull-Up
LED is output low when operating in 100BASE-X
modes and high when operating in 10BASE-T modes.
TP1_1: Pulled low at reset will select transmit trans-
former ratio to be 1.25:1. Default is 1:1 transformer.
LEDDPX[1]/PHYAD[4]
Port [1] Duplex LED
Input/Output, Pull-Up
LED low indicates full-duplex and high indicates half-
duplex.
PHY Address[4]. This is the first address bit received
in the management frame, and one of three MSBs for
MII management PHY address. The two LSBs, PHYAD
[1:0] are internally wired to four ports: PHYAD
[11]=Port3,..., PHYAD [00] = Port0. The PHYAD will
also determine the scramble seed, this will help to
reduce EMI when there are multiple ports switching at
the same time. To set this pin, use pull-up or pull-down
resistors in the range of 1 K
Ω to 4.7 KΩ.
LEDACT_LINK[1]/PHYAD[3]
Port [1] Transmit/Receive Activity LED
Input/Output, Pull-Up
LED is output low for approximately 30 ms each time
there is activity. LINK is an active low signal.
PHY Address[3]. This is the second MSB and one of
three MSB’s for MII management PHY address. To set
this pin, use pull-up or pull-down resistors in the range
of 1 K
Ω to 4.7 KΩ.
LEDSPD[1]/PHYAD[2]
Port [1] Speed LED
Input/Output, Pull-Up
LED is output low when operating in 100BASE-X
modes and high when operating in 10BASE-T modes.
PHY Address[2]. This is the third MSB and one of
three MSB’s for MII management PHY address. To set
this pin, use pull-up or pull-down resistors in the range
of 1 K
Ω to 4.7 KΩ.
LEDDPX[2]/DPLX
Port [2] Duplex LED
Input/Output, Pull-Up
LED low indicates full-duplex and high indicates half-
duplex.
DPLX: Full Duplex Mode Enable. This pin is logically
OR’ed with a full-duplex enable MII control bit to gener-
ate an internal full-duplex enable signal. When as-
serted high, the NetPHY™ 4LP device operates in full-
duplex mode as determined through Auto-Negotiation
or software setting. When asserted low, the internal
control bit (Register 0, bit 8) will determine the full-du-
plex operating mode.
LEDACT_LINK[2]
Port [2] Transmit/Receive Activity LED
Output, Pull-Up
LED is output low for approximately 30 ms each time
there is activity. LINK is an active low signal. This signal
should have a 1k–4.7K
Ω pull-up.
LEDSPD[2]/FORCE100
Port [2] Speed LED
Input/Output, Pull-Up
LED is output low when operating in 100BASE-X
modes and high when operating in 10BASE-T modes.
FORCE100: Force 100BASE-X Operation. When this
signal is pulled high and ANEGA is low at reset, all
ports will be forced to 100BASE-TX operation. When
asserted low and ANEGA is low, all ports are forced to


유사한 부품 번호 - AM79C875

제조업체부품명데이터시트상세설명
logo
Advanced Micro Devices
AM79C873 AMD-AM79C873 Datasheet
543Kb / 44P
   NetPHY??-1 10/100 Mbps Ethernet Physical Layer Single-Chip Transceiver with 100BASE-FX Support
AM79C873KCW AMD-AM79C873KCW Datasheet
543Kb / 44P
   NetPHY??-1 10/100 Mbps Ethernet Physical Layer Single-Chip Transceiver with 100BASE-FX Support
AM79C874 AMD-AM79C874 Datasheet
542Kb / 60P
   NetPHY-1LP Low Power 10/100-TX/FX Ethernet Transceiver
AM79C874VC AMD-AM79C874VC Datasheet
542Kb / 60P
   NetPHY-1LP Low Power 10/100-TX/FX Ethernet Transceiver
AM79C874VI AMD-AM79C874VI Datasheet
542Kb / 60P
   NetPHY-1LP Low Power 10/100-TX/FX Ethernet Transceiver
More results

유사한 설명 - AM79C875

제조업체부품명데이터시트상세설명
logo
Advanced Micro Devices
AM79C874 AMD-AM79C874 Datasheet
542Kb / 60P
   NetPHY-1LP Low Power 10/100-TX/FX Ethernet Transceiver
logo
Agere Systems
LU3X34FTR AGERE-LU3X34FTR Datasheet
678Kb / 52P
   Quad 3 V 10/100 Ethernet Transceiver TX/FX
logo
Broadcom Corporation.
BCM5228 BOARDCOM-BCM5228 Datasheet
157Kb / 1P
   10/100 BASE - TX/FX OCTAL TRANSCEIVER
BCM5226 BOARDCOM-BCM5226 Datasheet
162Kb / 1P
   10/100 BASE TX/FX HEX TRANSCEIVER
logo
Advanced Micro Devices
AM79C873 AMD-AM79C873 Datasheet
543Kb / 44P
   NetPHY??-1 10/100 Mbps Ethernet Physical Layer Single-Chip Transceiver with 100BASE-FX Support
logo
Davicom Semiconductor, ...
DM9161 DAVICOM-DM9161_08 Datasheet
666Kb / 50P
   10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver
logo
STMicroelectronics
STE800P STMICROELECTRONICS-STE800P Datasheet
54Kb / 4P
   10/100 BASE-TX/FX 8 PORT TRANSCEIVER
logo
List of Unclassifed Man...
AC104QF ETC2-AC104QF Datasheet
305Kb / 37P
   Ultra Low Power 10/100 Quad RMII Ethernet Transceiver
AC1040F ETC2-AC1040F Datasheet
327Kb / 37P
   Ultra Low Power 10/100 Quad RMII Ethernet Transceiver
logo
Broadcom Corporation.
BCM5228 BOARDCOM-BCM5228_05 Datasheet
1Mb / 100P
   10/100BASE-TX/FX Octal Transceiver
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48


데이터시트 다운로드

Go To PDF Page


링크 URL




개인정보취급방침
ALLDATASHEET.CO.KR
ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com