전자부품 데이터시트 검색엔진
Selected language     Korean  ▼
부품명
         상세내용
Preview PDF Download HTML-1page HTML-10pages

PLQP0064KB-A 데이터시트(Datasheet) 81 Page - Renesas Technology Corp

부품명 PLQP0064KB-A
상세내용  32 MHz 32-bit RX MCUs, 50 DMIPS, up to 512 Kbytes of flash memory
PDF  127 Pages
Scroll/Zoom Zoom In 100% Zoom Out
제조사  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo 

 81 page
background image
R01DS0190EJ0130 Rev.1.30
Page 81 of 127
May 31, 2016
RX111 Group
5. Electrical Characteristics
5.3.3
Timing of Recovery from Low Power Consumption Modes
Note:
When the division ratios of PCLKB, PCLKD, FCLK, and ICLK are all set to 1.
Note 1. The recovery time varies depending on the state of each oscillator when the WAIT instruction is executed. The recovery time
when multiple oscillators are operating varies depending on the operating state of the oscillators that are not selected as the
system clock source. This applies when only the oscillator listed in each item is operating and the other oscillators are stopped.
Note 2. When the frequency of the crystal is 20 MHz.
When the main clock oscillator wait control register (MOSCWTCR) is set to 04h.
Note 3. When the frequency of PLL is 32 MHz.
When the main clock oscillator wait control register (MOSCWTCR) is set to 04h.
Note 4. When the frequency of the external clock is 20 MHz.
When the main clock oscillator wait control register (MOSCWTCR) is set to 00h.
Note 5. When the frequency of PLL is 32 MHz.
When the main clock oscillator wait control register (MOSCWTCR) is set to 00h.
Note 6. When the frequency of HOCO is 32 MHz.
When the high-speed clock oscillator wait control register (HOCOWTCR) is set to 05h.
Table 5.26
Timing of Recovery from Low Power Consumption Modes (1)
Conditions: 1.8 V ≤ VCC = VCC_USB ≤ 3.6 V, 1.8 V ≤ AVSS0 ≤ 3.6 V, VSS = AVSS0 = VSS_USB = 0 V, Ta = –40 to +105°C
Item
Symbol
Min.
Typ.
Max.
Unit
Test
Conditions
Recovery time
from software
standby mode*1
High-speed
mode
Crystal
connected to
main clock
oscillator
Main clock oscillator
operating*2
tSBYMC
2
3
ms
Figure 5.34
Main clock oscillator and
PLL circuit operating*3
tSBYPC
—2
3
ms
External clock
input to main
clock oscillator
Main clock oscillator
operating*4
tSBYEX
—35
50
μs
Main clock oscillator and
PLL circuit operating*5
tSBYPE
—70
95
μs
Sub-clock oscillator operating
tSBYSC
650
800
μs
HOCO clock oscillator operating*6
tSBYHO
—40
55
μs
LOCO clock oscillator operating
tSBYLO
—40
55
μs




Html 페이지

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64  65  66  67  68  69  70  71  72  73  74  75  76  77  78  79  80  81  82  83  84  85  86  87  88  89  90  91  92  93  94  95  96  97  98  99  100   ...More


데이터시트




링크 URL

ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ]  

Alldatasheet는?   |   광고문의    |   운영자에게 연락하기   |   개인정보취급방침   |   즐겨찾기   |   링크교환   |   제조사별 검색
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  , Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp  |   Russian : Alldatasheetru.com
Korean : Alldatasheet.co.kr   |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com  |   Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl