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RX230 데이터시트(PDF) 42 Page - Renesas Technology Corp

부품명 RX230
상세설명  54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory
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제조업체  RENESAS [Renesas Technology Corp]
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R01DS0261EJ0110 Rev.1.10
Page 42 of 177
Oct 30, 2015
RX230 Group, RX231 Group
4. I/O Registers
 Longword-size I/O registers
MOV.L #SFR_ADDR, R1
MOV.L #SFR_DATA, [R1]
CMP
[R1].L, R1
;; Next process
If multiple registers are written to and a subsequent instruction should be executed after the write operations are entirely
completed, only read the I/O register that was last written to and execute the operation using the value; it is not necessary
to read or execute operation for all the registers that were written to.
(3)
Number of Access Cycles to I/O Registers
For numbers of clock cycles for access to I/O registers, see Table 4.1, List of I/O Registers (Address Order).
The number of access cycles to I/O registers is obtained by following equation.*1
Number of access cycles to I/O registers = Number of bus cycles for internal main bus 1 +
Number of divided clock synchronization cycles +
Number of bus cycles for internal peripheral bus 1 to 6
The number of bus cycles of internal peripheral bus 1 to 6 differs according to the register to be accessed.
When peripheral functions connected to internal peripheral bus 2 to 6 or registers for the external bus control unit (except
for bus error related registers) are accessed, the number of divided clock synchronization cycles is added.
The number of divided clock synchronization cycles differs depending on the frequency ratio between ICLK and PCLK
(or FCLK, BCLK) or bus access timing.
In the peripheral function unit, when the frequency ratio of ICLK is equal to or greater than that of PCLK (or FCLK), the
sum of the number of bus cycles for internal main bus 1 and the number of the divided clock synchronization cycles will
be one cycle of PCLK (or FCLK) at a maximum. Therefore, one PCLK (or FCLK) has been added to the number of
access cycles shown in Table 4.1.
When the frequency ratio of ICLK is lower than that of PCLK (or FCLK), the subsequent bus access is started from the
ICLK cycle following the completion of the access to the peripheral functions. Therefore, the access cycles are described
on an ICLK basis.
In the external bus control unit, the sum of the number of bus cycles for internal main bus 1 and the number of divided
clock synchronization cycles will be one cycle of BCLK at a maximum. Therefore, one BCLK is added to the number of
access cycles shown in Table 4.1.
Note 1. This applies to the number of cycles when the access from the CPU does not conflict with the instruction fetching
to the external memory or bus access from the different bus master (DMAC or DTC).
(4)
Restrictions in Relation to RMPA and String-Manipulation Instructions
The allocation of data to be handled by RMPA or string-manipulation instructions to I/O registers is prohibited, and
operation is not guaranteed if this restriction is not observed.
(5)
Notes on Sleep Mode and Mode Transitions
During sleep mode or mode transitions, do not write to the system control related registers (indicated by 'SYSTEM' in the
Module Symbol column in Table 4.1, List of I/O Registers (Address Order)).


유사한 부품 번호 - RX230

제조업체부품명데이터시트상세설명
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Renesas Technology Corp
RX230 RENESAS-RX230_V01 Datasheet
3Mb / 170P
   54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory, various communication functions including USB 2.0 full-speed host/function/OTG, CAN, SD hostnterface,serial sound interface, capacitive touch sensing unit,
Sep 28, 2018
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유사한 설명 - RX230

제조업체부품명데이터시트상세설명
logo
Renesas Technology Corp
RX231 RENESAS-RX231 Datasheet
3Mb / 170P
   54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory
RX130 RENESAS-RX130 Datasheet
1Mb / 116P
   32-MHz, 32-bit RX MCUs, 50 DMIPS, up to 128-KB flash memory
RX23T RENESAS-RX23T Datasheet
1Mb / 98P
   40-MHz 32-bit RX MCUs, built-in FPU, 65.6 DMIPS
RX113 RENESAS-RX113_16 Datasheet
1Mb / 131P
   32 MHz, 32-bit RX MCUs, 50 DMIPS, up to 512 Kbytes of flash memory
RX111 RENESAS-RX111_16 Datasheet
1Mb / 127P
   32 MHz 32-bit RX MCUs, 50 DMIPS, up to 512 Kbytes of flash memory
RX634 RENESAS-RX634 Datasheet
902Kb / 106P
   54 MHz 32-bit RX MCU with FPU, 90 DMIPS, up to 2-Mbyte flash memory
R5F52108ADFP RENESAS-R5F52108ADFP Datasheet
782Kb / 92P
   50-MHz 32-bit RX MCUs, 78 DMIPS, up to 512-KB flash memory, 12-bit AD, 10-bit DA
RX23E-A RENESAS-RX23E-A Datasheet
1Mb / 98P
   32-MHz, 32-bit RX MCUs with up to 256-KB flash memory,
RX210 RENESAS-RX210 Datasheet
6Mb / 223P
   50-MHz 32-bit RX MCUs, 78 DMIPS, up to 1-MB flash memory,
RX230 RENESAS-RX230_V01 Datasheet
3Mb / 170P
   54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory, various communication functions including USB 2.0 full-speed host/function/OTG, CAN, SD hostnterface,serial sound interface, capacitive touch sensing unit,
Sep 28, 2018
More results


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