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S7G2 데이터시트(PDF) 47 Page - Renesas Technology Corp |
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S7G2 데이터시트(HTML) 47 Page - Renesas Technology Corp |
47 / 116 page R01DS0262EU0100 Rev.1.00 Page 47 of 113 Feb 23, 2016 S7G2 2. Electrical Characteristics 2.3.4 Wakeup Timing and Duration Note 1. The recovery time is determined by the system clock source. When multiple oscillators are active, the recovery time can be determined with the following equation: Total recovery time = recovery time for an oscillator as the system clock source + the longest oscillation stabilization time of any oscillators requiring longer stabilization times than the system clock source + 2 LOCO cycles (when LOCO is operating) + 3 SOSC cycles (when Subosc is oscillating and MSTPC0 = 0 (CAC module stop)). Note 2. When the frequency of the crystal is 24 MHz (Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 05h). For other settings (MOSCWTCR is set to Xh), the recovery time can be determined with the following equation: tSBYMC (MOSCWTCR = Xh) = tSBYMC (MOSCWTCR = 05h) + (tMAINOSCWT (MOSCWTCR = Xh) - tMAINOSCWT (MOSCWTCR = 05h)) Note 3. When the frequency of PLL is 240 MHz (Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 05h). For other settings (MOSCWTCR is set to Xh), the recovery time can be determined with the following equation: tSBYMC (MOSCWTCR = Xh) = tSBYMC (MOSCWTCR = 05h) + (tMAINOSCWT (MOSCWTCR = Xh) - tMAINOSCWT (MOSCWTCR = 05h)) Note 4. When the frequency of the external clock is 24 MHz (Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 00h). For other settings (MOSCWTCR is set to Xh), the recovery time can be determined with the following equation: tSBYMC (MOSCWTCR = Xh) = tSBYMC (MOSCWTCR = 00h) + (tMAINOSCWT (MOSCWTCR = Xh) - tMAINOSCWT (MOSCWTCR = 00h)) Note 5. When the frequency of PLL is 240 MHz (Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 00h). For other settings (MOSCWTCR is set to Xh), the recovery time can be determined with the following Table 2.16 Timing of recovery from low-power modes and duration Item Symbol Min Typ Max Unit Test conditions Recovery time from Software Standby mode*1 Crystal resonator connected to main clock oscillator System clock source is main clock oscillator*2 tSBYMC -- 2.8 ms Figure 2.10 The division ratio of all oscillators is 1. System clock source is PLL with main clock oscillator*3 tSBYPC -- 3.2 ms External clock input to main clock oscillator System clock source is main clock oscillator*4 tSBYEX -- 280 μs System clock source is PLL with main clock oscillator*5 tSBYPE -- 700 μs System clock source is sub-clock oscillator*8 tSBYSC --1.3 ms System clock source is LOCO*8 tSBYLO --1.4 ms System clock source is HOCO clock oscillator*6 tSBYHO - - 300 µs System clock source is MOCO clock oscillator*7 tSBYMO - - 300 µs Recovery time from Deep Software Standby mode tDSBY --1.0 ms Figure 2.11 Wait time after cancellation of Deep Software Standby mode tDSBYWT 31 - 32 tcyc Recovery time from Software Standby mode to Snooze High-speed mode when system clock source is HOCO (20 MHz) tSNZ --68 μs- High-speed mode when system clock source is MOCO (8 MHz) tSNZ --14*9 μs Normal mode duration*10 System clock source is main clock oscillator tNML -*11 -- tcycmosc Figure 2.10 System clock source is PLL with main clock oscillator |
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