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74LVC3G17GT 데이터시트(PDF) 2 Page - NXP Semiconductors

부품명 74LVC3G17GT
상세설명  Triple non-inverting Schmitt trigger with 5 V tolerant input
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 31 January 2005
2 of 16
Philips Semiconductors
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
4.
Quick reference data
[1]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD =CPD × VCC2 × fi × N+ ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(C
L × VCC
2
× f
o) = sum of outputs.
[2]
The condition is VI = GND to VCC.
5.
Ordering information
6.
Marking
Table 1:
Quick reference data
GND = 0 V; Tamb =25 °C.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tPHL, tPLH
propagation delay
input nA to output nY
VCC = 1.8 V; CL =30pF;
RL =1kΩ
-
5.6
-
ns
VCC = 2.5 V; CL =30pF;
RL = 500 Ω
-
3.7
-
ns
VCC = 2.7 V; CL =50pF;
RL = 500 Ω
-
3.8
-
ns
VCC = 3.3 V; CL =50pF;
RL = 500 Ω
-
3.6
-
ns
VCC = 5.0 V; CL =50pF;
RL = 500 Ω
-
2.7
-
ns
CI
input capacitance
-
3.5
-
pF
CPD
power dissipation
capacitance per buffer
VCC = 3.3 V
[1] [2] -
16.3
-
pF
Table 2:
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74LVC3G17DP
−40 °C to +125 °C
TSSOP8
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
SOT505-2
74LVC3G17DC
−40 °C to +125 °C
VSSOP8
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
SOT765-1
74LVC3G17GT
−40 °C to +125 °C
XSON8
plastic extremely thin small outline package; no leads;
8 terminals; body 1
× 1.95 × 0.5 mm
SOT833-1
Table 3:
Marking codes
Type number
Marking code
74LVC3G17DP
V17
74LVC3G17DC
V17
74LVC3G17GT
V17


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