GS71116AGP/U

64K x 16

1Mb Asynchronous SRAM

7, 8, 10, 12 ns

TSOP, FP-BGA

Commercial Temp

Industrial Temp

Rev: 1.10 1/2013

1/13

© 2001, GSI Technology

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Features

• Fast access time: 7, 8, 10, 12 ns

• CMOS low power operation: 145/125/100/85 mA at

minimum cycle time

• Single 3.3 V power supply

• All inputs and outputs are TTL-compatible

• Byte control

• Fully static operation

• Industrial Temperature Option: –40° to 85°C

• Package line up

GP: RoHS-compliant 400 mil, 44-pin TSOP Type II

package

U:

6 mm x 8 mm Fine Pitch Ball Grid Array package

GU: RoHS-compliant 6 mm x 8 mm Fine Pitch Ball Grid

Array package

Description

The GS71116A is a high speed CMOS static RAM organized

as 65,536-words by 16-bits. Static design eliminates the need

for external clocks or timing strobes. Operating on a single

3.3 V power supply and all inputs and outputs are TTL-

compatible. The GS71116A is available in the 6 mm x 8 mm

Fine Pitch BGA and 400 mil TSOP Type-II packages.

Pin Descriptions

Symbol

Description

Address input

Data input/output

CE

Chip enable input

LB

Lower byte enable input

(DQ1 to DQ8)

UB

Upper byte enable input

(DQ9 to DQ16)

WE

Write enable input

OE

Output enable input

+3.3 V power supply

Ground

NC

No connect

1

2

3

4

5

6

A

LB

OE

NC

B

UB

CE

C

D

E

NC

F

G

NC

WE

H

NC

NC

Fine Pitch BGA 64K x 16-Bump Configuration

6 mm x 8 mm, 0.75 mm Bump Pitch (Package U)

Top View

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

CE

WE

A14

OE

UB

LB

NC

Top view

21

22

24

23

44-pin

TSOP II

NC

NC

TSOP-II 64K x 16-Pin Configuration

Package TP