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GS81302T09E-375I 데이터시트(PDF) 6 Page - GSI Technology |
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GS81302T09E-375I 데이터시트(HTML) 6 Page - GSI Technology |
6 / 36 page Pin Description Table Symbol Description Type Comments SA Synchronous Address Inputs Input — R/W Synchronous Read/Write Input Read: Active High Write: Active Low BW0–BW3 Synchronous Byte Writes Input Active Low x18/x36 only NW0–NW1 Nybble Write Control Pin Input Active Low x8 only LD Synchronous Load Pin Input Active Low K Input Clock Input Active High K Input Clock Input Active Low C Output Clock Input Active High C Output Clock Input Active Low TMS Test Mode Select Input — TDI Test Data Input Input — TCK Test Clock Input Input — TDO Test Data Output Output — VREF HSTL Input Reference Voltage Input — ZQ Output Impedance Matching Input Input — MCL Must Connect Low — — DQ Data I/O Input/Output Three State Doff Disable DLL when low Input Active Low CQ Output Echo Clock Output — CQ Output Echo Clock Output — VDD Power Supply Supply 1.8 V Nominal VDDQ Isolated Output Buffer Supply Supply 1.8 V or 1.5 V Nominal VSS Power Supply: Ground Supply — NC No Connect — — GS81302T08/09/18/36E-375/350/333/300/250 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.03b 12/2011 6/35 © 2011, GSI Technology Notes: 1. NC = Not Connected to die or any other pin 2. C, C, K, K cannot be set to VREF voltage. 3. When ZQ pin is directly connected to VDDQ, output impedance is set to minimum and it cannot be connected to ground or left unconnected. |
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