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GS81314PD19GK-933 데이터시트(PDF) 5 Page - GSI Technology

부품명 GS81314PD19GK-933
상세설명  Burst of 4 Single-Bank ECCRAM
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제조업체  GSI [GSI Technology]
홈페이지  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS81314PD19GK-933 데이터시트(HTML) 5 Page - GSI Technology

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GS81314PD19/37GK-933/800
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.02 3/2016
5/39
© 2015, GSI Technology
ZQ
Driver / ODT Impedance Control Resistor Input — Must be connected to VSS through an external resistor
RQ to program driver and ODT impedances.
Input
RCS
Current Source Resistor Input — Must be connected to VSS through an external 2K resistor to provide
an accurate current source for the PLL.
Input
MZT
ODT Mode Select — Sets the default ODT state globally for all input groups during power-up and reset.
Must be tied High or Low.
MZT = 0: disables ODT on all input groups, regardless of PZT[1:0].
MZT = 1: enables ODT on select input groups, as specified by PZT[1:0].
Note: The ODT state for each input group can be changed at any time via the Configuration Registers.
Input
PZT[1:0]
ODT Configuration Select — Set the default ODT state for various combinations of input groups during
power-up and reset, when MZT = 1. Must be tied High or Low.
PZT[1:0] = 00: enables ODT on write data only.
PZT[1:0] = 01: enables ODT on write data and input clocks.
PZT[1:0] = 10: enables ODT on write data, address, and control.
PZT[1:0] = 11: enables ODT on write data, input clocks, address, and control.
Note: The ODT state for each input group can be changed at any time via the Configuration Registers.
Input
VDD
Core Power Supply
VDDQ
I/O Power Supply
VREF
Input Reference Voltage — Input buffer reference voltage.
VSS
Ground
TCK
JTAG Clock — Weakly pulled Low internally.
Input
TMS
JTAG Mode Select — Weakly pulled High internally.
Input
TDI
JTAG Data Input — Weakly pulled High internally.
Input
TDO
JTAG Data Output
Output
MCH
Must Connect High — May be tied to VDDQ directly or via a 1k resistor.
Input
MCL
Must Connect Low — May be tied to VSS directly or via a 1k resistor.
Input
NC
No Connect — There is no internal chip connection to these pins. They may be left unconnected, or tied/
driven High or Low.
NUI
Not Used Input — There is an internal chip connection to these input pins, but they are unused by the
device. They are pulled High internally. They may be left unconnected or tied/driven High. They should not
be tied/driven Low.
Input
NUO
Not Used Output — There is an internal chip connection to these output pins, but they are unused by the
device. The drivers are tri-stated internally. They should be left unconnected.
Output
Symbol
Description
Type


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