GS81313LQ18/36GK-800/714/600

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Rev: 1.13 7/2016

8/26

© 2014, GSI Technology

Clock Truth Table

SA

R

W

Current Operation

D

Q

CK

CK

CK

CK

KD

KD

CQ

CQ

X

X

1

1

NOP

X

X

0

X

V

1

0

Write Only

D1

D2

0

V

X

0

1

Read Only

X

X

Q1

Q2

V

V

0

0

Read + Write

D1

D2

Q1

Q2

Notes:

1. 1 = High; 0 = Low; V = Valid; X = don’t care.

2. D1 and D2 indicate the first and second pieces of Write Data transferred during Write operations.

3. Q1 and Q2 indicate the first and second pieces of Read Data transferred during Read operations.

4. Q pins are driven Low for one cycle in response to NOP and Write Only commands, 3 cycles after the command is sampled.