전자부품 데이터시트 검색엔진 |
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GS8662DT10BGD-300I 데이터시트(PDF) 6 Page - GSI Technology |
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GS8662DT10BGD-300I 데이터시트(HTML) 6 Page - GSI Technology |
6 / 28 page Pin Description Table Symbol Description Type Comments SA Synchronous Address Inputs Input — R Synchronous Read Input Active Low W Synchronous Write Input Active Low BW0–BW3 Synchronous Byte Writes Input Active Low NW0–NW1 Synchronous Nybble Writes Input Active Low (x8 only) K Input Clock Input Active High K Input Clock Input Active Low TMS Test Mode Select Input — TDI Test Data Input Input — TCK Test Clock Input Input — TDO Test Data Output Output — VREF HSTL Input Reference Voltage Input — ZQ Output Impedance Matching Input Input — Qn Synchronous Data Outputs Output — Dn Synchronous Data Inputs Input — Doff Disable DLL when low Input Active Low CQ Output Echo Clock Output — CQ Output Echo Clock Output — VDD Power Supply Supply 1.8 V Nominal VDDQ Isolated Output Buffer Supply Supply 1.8 V or 1.5 V Nominal VSS Power Supply: Ground Supply — QVLD Q Valid Output Output — ODT On-Die Termination Input Low = Low Impedance Range High/Float = High Impedance Range NC No Connect — — GS8662DT07/10/19/37BD-450/400/350/333/300 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.00b 8/2017 6/28 © 2011, GSI Technology Notes: 1. NC = Not Connected to die or any other pin 2. When ZQ pin is directly connected to VDDQ, output impedance is set to minimum value and it cannot be connected to ground or left unconnected. 3. K and K cannot be set to VREF voltage. |
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