전자부품 데이터시트 검색엔진 |
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GS8180QV18BD-200 데이터시트(PDF) 4 Page - GSI Technology |
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GS8180QV18BD-200 데이터시트(HTML) 4 Page - GSI Technology |
4 / 28 page Pin Description Table Symbol Description Type Comments SA Synchronous Address Inputs Input — NC No Connect — — R Synchronous Read Input Active Low W Synchronous Write Input Active Low BW0–BW1 Synchronous Byte Writes Input Active Low BW2–BW3 Synchronous Byte Writes Input Active Low (x36 only) K Input Clock Input Active High K Input Clock Input Active Low C Output Clock Input Active High C Output Clock Input Active Low TMS Test Mode Select Input — TDI Test Data Input Input — TCK Test Clock Input Input — TDO Test Data Output Output — VREF HSTL Input Reference Voltage Input — ZQ Output Impedance Matching Input Input — MCL Must Connect Low — — D0–D17 Synchronous Data Inputs Input D18–D35 Synchronous Data Inputs Input Q0–Q17 Synchronous Data Outputs Output Q18–Q35 Synchronous Data Outputs Output VDD Power Supply Supply 2.5 V Nominal VDDQ Isolated Output Buffer Supply Supply 1.8 or 1.5 V Nominal VSS Power Supply: Ground Supply — GS8180QV18/36BD-200/167 Rev: 1.02b 11/2011 4/28 © 2007, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Notes: 1. NC = Not Connected to die or any other pin 2. C, C, K, or K cannot be set to VREF voltage. |
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