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AD4020BCPZ-RL7 데이터시트(PDF) 6 Page - Analog Devices |
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AD4020BCPZ-RL7 데이터시트(HTML) 6 Page - Analog Devices |
6 / 37 page Data Sheet AD4020 Rev. A | Page 5 of 36 Parameter Test Conditions/Comments Min Typ Max Unit VIO Only 1.8 MSPS, high-Z mode disabled 1.0 mW Energy per Conversion 8.3 nJ/sample TEMPERATURE RANGE Specified Performance TMIN to TMAX −40 +125 °C 1 The acquisition phase is the time available for the input sampling capacitors to acquire a new input with the ADC running at a throughput rate of 1.8 MSPS. 2 A throughput rate of 1.8 MSPS can only be achieved with turbo mode enabled and a minimum SCK rate of 71 MHz. Refer to Table 4 for the maximum achievable throughput for different modes of operation. 3 Transient response is the time required for the ADC to acquire a full-scale input step to ±2 LSB accuracy. 4 The minimum and maximum values are guaranteed by characterization, but not production tested. 5 See the 1/f noise plot in Figure 18. |
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