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AD73311L 데이터시트(PDF) 29 Page - Analog Devices

부품명 AD73311L
상세설명  Low Cost, Low Power CMOS
Download  37 Pages
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AD73311L 데이터시트(HTML) 29 Page - Analog Devices

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REV. A
AD73311L
–28–
In the main body of the program, the code loops waiting for the
initialization sequence to be completed.
check_init:
ax0 = dm (stat_flag);
af = pass ax0;
if ne jump check_init;
If the AD73311L is used in a cascade of two or more codec
units, it is important to observe some restrictions in the sequence
of sending initialization words to the two codecs. It is preferable
to send groups of control words for the corresponding control
registers in each codec and it is essential to send the control
words in descending order—last device first . . . first device last.
Control Registers A and B contain settings, such as sampling
rate, serial clock rate etc., which critically require synchronous
update in each codec.
Once the device has been initialized, Control Register A on each
codecs is written with a control word which changes the Operating
Mode from Program Mode to either Data Mode or Mixed Control
Data Mode. The device count field, which defaults to 000b, will
have to be programmed to the required setting—depending on the
number of devices in cascade. In Data Mode or Mixed Mode,
the main function of the device is to return ADC samples from
each codec and to accept DAC words for each codecs. During
each sample interval, ADC samples will be returned from the
device equal to the number of devices in cascade, while in the
same interval DAC update samples will be sent to the device
again the number of DAC words being equal to the number of
devices in the cascade.
In order to reduce the number of interrupts and to reduce
complexity, autobuffering can be used to ensure that only one
interrupt is generated during each sampling interval.


유사한 부품 번호 - AD73311L_17

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