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GS816118D-200 데이터시트(PDF) 5 Page - List of Unclassifed Manufacturers |
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5 / 40 page 5/8 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Revision: 9/26/02 GS816118/32/36D Supplemental Datasheet Information GS816118/32/36D 165-Bump BGA Pin Description Symbol Type Description A0, A1 I Address field LSBs and Address Counter Preset Inputs An I Address Inputs A17, A18, A19 I Address Inputs DQA1–DQA9 DQB1–DQB9 DQC1–DQC9 DQD1–DQD9 I/O Data Input and Output pins BA, BB, BC, BD I Byte Write Enable for DQA, DQB, DQC, DQD I/Os; active low NC — No Connect CK I Clock Input Signal; active high BW I Byte Write—Writes all enabled bytes; active low GW I Global Write Enable—Writes all bytes; active low E1 I Chip Enable; active low E3 I Chip Enable; active low E2 I Chip Enable; active high G I Output Enable; active low ADV I Burst address counter advance enable; active l0w ADSC, ADSP I Address Strobe (Processor, Cache Controller); active low ZZ I Sleep mode control; active high FT I Flow Through or Pipeline mode; active low LBO I Linear Burst Order mode; active low TMS I Scan Test Mode Select TDI I Scan Test Data In TDO O Scan Test Data Out TCK I Scan Test Clock MCL — Must Connect Low VDD I Core power supply VSS I I/O and Core Ground VDDQ I Output driver power supply |
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