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TPPM0111DWPR 데이터시트(PDF) 4 Page - Texas Instruments |
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TPPM0111DWPR 데이터시트(HTML) 4 Page - Texas Instruments |
4 / 10 page TPPM0111 DUAL LOW-DROPOUT LINEAR REGULATOR SLVS414 – DECEMBER 2001 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics, TA = 0°C to 55°C, CL = 100 µF, V(5VCC) = 5 V (unless otherwise noted) The operating ratings specified below is interpreted as conditions that do not degrade the device’s parametric or functional specifications for the life of the product. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT V(5VCC) Input voltage 4.7 5 5.3 V I(Q) Quiescent supply current IO(3.3VOUT) = 1.2 A and IO(1.5VOUT) = 300 mA 1 mA I(Q) Quiescent su ly current With no loads on outputs 600 µA I Output load current 3.3VOUT = 3.3 V ±3% 1.5 A IO Output load current 1.5VOUT = 1.5 V ±2% 300 mA V(3.3VOUT) 3.3-V output IO = 1 mA to 1.2 A 3.23 3.33 3.43 V V(1.5VOUT) 1.5-V output IO = 1 mA to 250 mA 1.47 1.5 1.53 V V Regulator drop-out 3.3VOUT IO < 1.2 A 1 V V(DO) Regulator dro out voltage 1.5VOUT IO < 250 mA 2.8 V I Overcurrent protection 3.3VOUT, IL↑, See Note 4 2.25 3 5.4 A I(3.3VOUT)OC Overcurrent protection Hysteresis 500 mA I Overcurrent protection 1.5VOUT, See Note 4 0.45 0.6 1.08 A I(1.5VOUT)OC Overcurrent protection Hysteresis 200 mA CL Load capacitance for both regulated outputs 100 µF ESR(CL) Equivalent series resistance 1 Ω Vth Threshold voltage 5 V ↓, IO(3.3VOUT)= 1.2 A, IO(1.5VOUT) = 250 mA 3.4 4.2 V Vth Threshold voltage Hysteresis 250 mV T S † Thermal shutdown hysteresis Temperature ↑ 150 180 °C TTSD† Thermal shutdown hysteresis Hysteresis 15 °C † Design targets only. Not tested in production. NOTE 4: In the event of an overcurrent condition, the output should be a constant current limit such that the current never exceeds 360% of IO(TYP). Once the overcurrent condition is removed, the device returns to within the specified regulation limits. electrical characteristics, TA = 0°C to 55°C, CL = 100 µF, V(5VCC) = 5 V (unless otherwise noted)† The following parametric requirements are applicable to both 3.3VOUT and 1.5VOUT when subjected to these transient tests. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT V(OTL) Output transient voltage limit Voltage that load step can affect nominal output voltage (see Note 5) –3% 3% IO(STEP) Output load step current See Note 5 0 IO(TYP) A IO(SLEW) Output load step current slew rate See Note 5 and 6 8 A/ µs t(STEP) Output transient time limit See Note 5 10 µs Power up overshoot Maximum voltage overshoot allowed on either output when component begins regulation. Voltage transient time limit is t(STEP) (see Note 5) 7 % † Design targets only. Not tested in production.. NOTES: 5. Both outputs must maintain voltage regulation within ±3% of nominal, for a load step from 0 to IO(TYP) and from IO(TYP) to 0 A with a current slew rate of 8A/ms. Load may be toggled at a rate of 20 kHz typical. The outputs must return to the specified regulation limits within the specified time of 10 µs (typical). 6. Both linear regulators must be capable of regulating small ESR ceramic capacitors or aluminum electrolytic capacitors (see ESR specification). |
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