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SI4133G-BT 데이터시트(PDF) 1 Page - Silicon Laboratories |
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SI4133G-BT 데이터시트(HTML) 1 Page - Silicon Laboratories |
1 / 32 page Rev. 1.1 4/01 Copyright © 2001 by Silicon Laboratories Si4133G-DS11 Si41 33G Si412 3G/22G/13G/12G D UAL -B AND RF S YNT H ESIZ E R W IT H I N T EGRATED VC O S F OR GSM AND GP RS WIRELE S S C OM MUNICATI O NS Features Applications Description The Si4133G is a monolithic integrated circuit that performs both IF and dual-band RF synthesis for GSM and GPRS wireless communications applications. The Si4133G includes three VCOs, loop filters, reference and VCO dividers, and phase detectors. Divider and power down settings are programmable through a three-wire serial interface. Functional Block Diagram ! Dual-Band RF Synthesizers " RF1: 900 MHz to 1.8 GHz " RF2: 750 MHz to 1.5 GHz ! IF Synthesizer " IF: 500 MHz to 1000 MHz ! Integrated VCOs, Loop Filters, Varactors, and Resonators ! Minimal External Components Required ! Fast Settling Time: 140 µs ! Low Phase Noise ! Programmable Power Down Modes ! 1 µA Standby Current ! 18 mA Typical Supply Current ! 2.7 V to 3.6 V Operation ! Packages: 24-Pin TSSOP and 28-Pin MLP ! GSM, DCS1800, and PCS1900 Cellular Telephones ! GPRS Data Terminals ! HSCSD Data Terminals IFO U T IFL A IFL B RFL C RFL D RFL A RFL B RFO U T XIN PW D N B SD AT A SC LK SEN B IF RF2 RF1 ÷ 65 AU XOU T ÷ N ÷ N ÷ N P hase Detector P hase Detector P hase Detector 22-b it Data R egister Serial Interfa ce Pow er Down C ontrol Refe re nce A m p lifier Test Mux Patents pending Ordering Information: See page 28. Pin Assignments Si4133G-BT Si4133G-BM SC LK SD ATA GN DR RFL D RFL C GN DR RFL B RFL A GN DR GN DR RFOU T VD DR SEN B VD DI IF O U T GN DI IFLB IFLA GN DD VD DD GN DD XIN P W DNB AUXO U T 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 4 5 6 7 1 2 3 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 GN DI IF L B IF L A GN DD VD DD GN DD XIN GN DR R FLD R FLC GN DR R FLB R FLA GN DR |
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