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LMV716 데이터시트(Datasheet) 1 Page - National Semiconductor (TI)

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부품명 LMV716
상세내용  5 MHz, Low Noise, RRO, Dual Operational Amplifier with CMOS Input
PDF  15 Pages
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제조사  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
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 1 page
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LMV716
5 MHz, Low Noise, RRO, Dual Operational Amplifier with
CMOS Input
General Description
The LMV716 is a dual operational amplifier with both low
supply voltage and low supply current, making it ideal for
portable applications. The LMV716 CMOS input stage drives
the I
BIAS current down to 0.6 pA; this coupled with the low
noise voltage of 12.8 nV/
makes the LMV716 perfect
for applications requiring active filters, transimpedance am-
plifiers, and HDD vibration cancellation circuitry.
Along with great noise sensitivity, small signal applications
will benefit from the large gain bandwidth of 5 MHz coupled
with the minimal supply current of 1.6 mA and a slew rate of
5.8 V/µs.
The LMV716 provides rail-to-rail output swing into heavy
loads. The input common-mode voltage range includes
ground, which is ideal for ground sensing applications.
The LMV716 has a supply voltage spanning 2.7V to 5V and
is offered in an 8-pin MSOP package that functions across
the wide temperature range of −40˚C to 85˚C. This small
package makes it possible to place the LMV716 next to
sensors, thus reducing external noise pickup.
Features
(Typical values, V
+ = 3.3V, T
A = 25˚C, unless otherwise
specified)
n
Input noise voltage
12.8 nV/
n
Input bias current
0.6 pA
n
Offset voltage
1.6 mV
n
CMRR
80 dB
n
Open loop gain
122 dB
n
Rail-to-rail output
n
GBW
5 MHz
n
Slew rate
5.8 V/µs
n
Supply current
1.6 mA
n
Supply voltage range
2.7V to 5V
n
Operating temperature
−40˚C to 85˚C
n
8-pin MSOP package
Applications
n
Active filters
n
Transimpedance amplifiers
n
Audio preamp
n
HDD vibration cancellation circuitry
Typical Application Circuit
20179539
High Gain Band Pass Filter
September 2006
© 2006 National Semiconductor Corporation
DS201795
www.national.com
 2 page
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
Human Body Model
2000V
Machine Model
200V
Supply Voltage (V
+ –V)
5.5V
Storage Temperature Range
−65˚C to 150˚C
Junction Temperature (Note 3)
150˚C max
Mounting Temperature
Infrared or Convection (20 sec)
260˚C
Operating Ratings (Note 1)
Supply Voltage
2.7V to 5V
Temperature Range
−40˚C to 85˚C
Thermal Resistance (
θ
JA)
8-Pin MSOP
195˚C/W
3.3V Electrical Characteristics (Note 4) Unless otherwise specified, all limits are guaranteed for
T
J = 25˚C, V
+ = 3.3V, V= 0V. V
CM =V
+/2. Boldface limits apply at the temperature extremes (Note 5).
Symbol
Parameter
Condition
Min
(Note 6)
Typ
(Note 7)
Max
(Note 6)
Units
V
OS
Input Offset Voltage
V
CM = 1V
1.6
5
6
mV
I
B
Input Bias Current
(Note 8)
0.6
115
130
pA
I
OS
Input Offset Current
1
pA
CMRR
Common Mode Rejection Ratio
0
≤ V
CM
≤ 2.1V
60
50
80
dB
PSRR
Power Supply Rejection Ratio
2.7V
≤ V+ ≤ 5V, V
CM =1V
70
60
82
dB
CMVR
Common Mode Voltage Range
For CMRR
≥ 50 dB
−0.2
2.2
V
A
VOL
Open Loop Voltage Gain
Sourcing
R
L =10k
Ω to V+/2,
V
O = 1.65V to 2.9V
80
76
122
dB
Sinking
R
L =10k
Ω to V+/2,
V
O = 0.4V to 1.65V
80
76
122
Sourcing
R
L = 600
Ω to V+/2,
V
O = 1.65V to 2.8V
80
76
105
Sinking
R
L = 600
Ω to V+/2,
V
O = 0.5V to 1.65V
80
76
112
V
O
Output Swing High
R
L =10k
Ω to V+/2
3.22
3.17
3.29
V
R
L = 600
Ω to V+/2
3.12
3.07
3.22
Output Swing Low
R
L =10k
Ω to V+/2
0.03
0.12
0.16
R
L = 600
Ω to V+/2
0.07
0.23
0.27
I
OUT
Output Current
Sourcing, V
O =0V
20
15
31
mA
Sinking, V
O = 3.3V
30
25
41
I
S
Supply Current
V
CM = 1V
1.6
2.0
3
mA
SR
Slew Rate
(Note 9)
5.8
V/µs
GBW
Gain Bandwidth
5
MHz
www.national.com
2
 3 page
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3.3V Electrical Characteristics (Note 4) Unless otherwise specified, all limits are guaranteed for
TJ = 25˚C, V+ = 3.3V, V
= 0V. V
CM =V
+/2. Boldface limits apply at the temperature extremes (Note 5). (Continued)
Symbol
Parameter
Condition
Min
(Note 6)
Typ
(Note 7)
Max
(Note 6)
Units
e
n
Input-Referred Voltage Noise
f = 1 kHz
12.8
nV/
i
n
Input-Referred Current Noise
f = 1 kHz
0.01
pA/
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human Body Model is 1.5 k
Ω in series with 100 pF. Machine Model is 0Ω in series with 100 pF.
Note 3: The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is
PD =(TJ(MAX)-TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factor testing conditions result in very limited self-heating of
the device such that TJ =TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA.
Absolute Maximum Ratings indicate junction temperature limits beyond which the device maybe permanently degraded, either mechanically or electrically.
Note 5: Boldface limits apply to temperature range of −40˚C to 85˚C.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: Typical values represent the most likely parametric norm.
Note 8: Input bias current is guaranteed by design.
Note 9: Number specified is the lower of the positive and negative slew rates.
Connection Diagram
8-Pin MSOP
20179540
Top View
Ordering Information
Package
Part Number
Package Marking
Transport Media
NSC Drawing
8-Pin MSOP
LMV716MM
AR3A
1k Units Tape and Reel
MUA08A
LMV716MMX
3.5k Units Tape and Reel
www.national.com
3
 4 page
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Simplified Schematic
20179529
www.national.com
4
 5 page
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Typical Performance Characteristics Unless otherwise specified, V+ 3.3V, T
J = 25˚C.
Supply Current vs. Supply Voltage
Offset Voltage vs. Common Mode
20179506
20179505
Input Bias Current vs. Common Mode
Input Bias Current vs. Common Mode
20179527
20179526
Input Bias Current vs. Common Mode
Output Positive Swing vs. Supply Voltage
20179525
20179585
www.national.com
5
 6 page
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Typical Performance Characteristics Unless otherwise specified, V+ 3.3V, T
J = 25˚C. (Continued)
Output Negative Swing vs. Supply Voltage
Output Positive Swing vs. Supply Voltage
20179502
20179501
Output Negative Swing vs. Supply Voltage
Sinking Current vs. V
OUT
20179584
20179503
Sourcing Current vs. V
OUT
PSRR vs. Frequency
20179504
20179531
www.national.com
6
 7 page
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Typical Performance Characteristics Unless otherwise specified, V+ 3.3V, T
J = 25˚C. (Continued)
CMRR vs. Frequency
Crosstalk Rejection
20179536
20179537
Inverting Large Signal Pulse Response
Inverting Small Signal Pulse Response
20179535
20179533
Non-Inverting Large Signal Pulse Response
Non-Inverting Small Signal Pulse Response
20179534
20179532
www.national.com
7
 8 page
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Typical Performance Characteristics Unless otherwise specified, V+ 3.3V, T
J = 25˚C. (Continued)
Open Loop Frequency vs. R
L
Open Loop Frequency Response over Temperature
20179521
20179522
Open Loop Frequency Response vs. C
L
Open Loop Frequency Response vs. C
L
20179523
20179528
Voltage Noise vs. Frequency
20179524
www.national.com
8
 9 page
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Application Information
With the low supply current of only 1.6 mA, the LMV716
offers users the ability to maximize battery life. This makes
the LMV716 ideal for battery powered systems. The
LMV716’s rail-to-rail output swing provides the maximum
possible dynamic range at the output. This is particularly
important when operating on low supply voltages.
CAPACITIVE LOAD TOLERANCE
The LMV716, when in a unity-gain configuration, can directly
drive large capacitive loads in unity-gain without oscillation.
The unity-gain follower is the most sensitive configuration to
capacitive loading; direct capacitive loading reduces the
phase margin of amplifiers. The combination of the amplifi-
er’s output impedance and the capacitive load induces
phase lag. This results in either an underdamped pulse
response or oscillation. To drive a heavier capacitive load,
the circuit in Figure 1 can be used.
In Figure 1, the isolation resistor R
ISO and the load capacitor
C
L form a pole to increase stability by adding more phase
margin to the overall system. The desired performance de-
pends on the value of R
ISO. The bigger the RISO resistor
value, the more stable V
OUT will be.
The circuit in Figure 2 is an improvement to the one in Figure
1 because it provides DC accuracy as well as AC stability. If
there were a load resistor in Figure 1, the output would be
voltage divided by R
ISO and the load resistor. Instead, in
Figure 2,R
F
provides the DC accuracy by using feed-
forward techniques to connect V
IN to RL. Due to the input
bias current of the LMV716, the designer must be cautious
when choosing the value of R
F.CF and RISO serve to coun-
teract the loss of phase margin by feeding the high fre-
quency component of the output signal back to the amplifi-
er’s inverting input, thereby preserving phase margin in the
overall feedback loop. Increased capacitive drive is possible
by increasing the value of C
F. This in turn will slow down the
pulse response.
DIFFERENCE AMPLIFIER
The difference amplifier allows the subtraction of two volt-
ages or, as a special case, the cancellation of a signal
common to two inputs. It is useful as a computational ampli-
fier in making a differential to single-ended conversion or in
rejecting a common mode signal.
20179507
FIGURE 1. Indirectly Driving a Capacitive Load using
Resistive Isolation
20179509
FIGURE 2. Indirectly Driving a Capacitive Load with DC
Accuracy
20179510
FIGURE 3. Difference Amplifier
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9
 10 page
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Application Information (Continued)
SINGLE-SUPPLY INVERTING AMPLIFIER
There may be cases where the input signal going into the
amplifier is negative. Because the amplifier is operating in
single supply voltage, a voltage divider using R
3 and R4 is
implemented to bias the amplifier so the inverting input
signal is within the input common voltage range of the am-
plifier. The capacitor C
1 is placed between the inverting input
and resistor R
1 to block the DC signal going into the AC
signal source, V
IN. The values of R1 and C1 affect the cutoff
frequency, fc = 12
π R
1C1. As a result, the output signal is
centered around mid-supply (if the voltage divider provides
V
+/2 at the non-inverting input). The output can swing to both
rails, maximizing the signal-to-noise ratio in a low voltage
system.
INSTRUMENTATION AMPLIFIER
Measurement of very small signals with an amplifier requires
close attention to the input impedance of the amplifier, the
overall signal gain from both inputs to the output, as well as,
the gain from each input to the output. This is because we
are only interested in the difference of the two inputs and the
common signal is considered noise. A classic solution is an
instrumentation amplifier. Instrumentation amplifiers have a
finite, accurate, and stable gain. Also they have extremely
high input impedances and very low output impedances.
Finally they have an extremely high CMRR so that the
amplifier can only respond to the differential signal.
Three-Op-Amp Instrumentation Amplifier
A typical instrumentation amplifier is shown in Figure 5.
There are two stages in this configuration. The last stage,
the output stage, is a differential amplifier. In an ideal case
the two amplifiers of the first stage, the input stage, would be
set up as buffers to isolate the inputs. However they cannot
be connected as followers due to the mismatch of real
amplifiers. The circuit in Figure 5 utilizes a balancing resistor
between the two amplifiers to compensate for this mismatch.
The product of the two stages of gain will be the gain of the
instrumentation amplifier circuit. Ideally, the CMRR should
be infinite. However the output stage has a small non-zero
common mode gain which results from resistor mismatch.
In the input stage of the circuit, current is the same across all
resistors. This is due to the high input impedance and low
input bias current of the LMV716. With the node equations
we have:
(1)
By Ohm’s Law:
(2)
However:
(3)
So we have:
(4)
20179515
FIGURE 4. Single-supply Inverting Amplifier
20179542
FIGURE 5. Three-Op-Amp Instrumentation Amplifier
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