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TC55VEM316AXBN40 데이터시트(HTML) 1 Page - Toshiba Semiconductor

부품명 TC55VEM316AXBN40
상세내용  TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
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제조사  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
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TC55VEM316AXBN40 데이터시트(HTML) 1 Page - Toshiba Semiconductor

 
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TC55VEM316AXBN40,55
2002-07-23
1/14
TENTATIVE
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
524,288-WORD BY 16-BIT FULL CMOS STATIC RAM
DESCRIPTION
The TC55VEM316AXBN is a 8,388,608-bit static random access memory (SRAM) organized as 524,288 words by
16 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 2.3 to
3.6 V power supply. Advanced circuit technology provides both high speed and low power at an operating current of
3 mA/MHz and a minimum cycle time of 40 ns. It is automatically placed in low-power mode at 0.7 µA standby
current (at VDD = 3 V, Ta = 25°C, typical) when chip enable ( CE1 ) is asserted high or (CE2) is asserted low. There
are three control inputs. CE1 and CE2 are used to select the device and for data retention control, and output
enable ( OE ) provides fast memory access. Data byte control pin ( LB , UB ) provides lower and upper byte access.
This device is well suited to various microprocessor system applications where high speed, low power and battery
backup are required. And, with a guaranteed operating extreme temperature range of −40° to 85°C, the
TC55VEM316AXBN can be used in environments exhibiting extreme temperature conditions. The
TC55VEM316AXBN is available in a plastic 48-ball BGA.
FEATURES
• Low-power dissipation
Operating: 9 mW/MHz (typical)
• Single power supply voltage of 2.3 to 3.6 V
• Power down features using CE1 and CE2
• Data retention supply voltage of 1.5 to 3.6 V
• Direct TTL compatibility for all inputs and outputs
• Wide operating temperature range of −40° to 85°C
• Standby Current (maximum):
3.6 V
10
µA
3.0 V
5
µA
PIN ASSIGNMENT (TOP VIEW)
PIN NAMES
48 PIN BGA
A0~A18
Address Inputs
1
CE
, CE2
Chip Enable
R/W
Read/Write Control
OE
Output Enable
LB , UB
Data Byte Control
I/O1~I/O16
Data Inputs/Outputs
VDD
Power
GND
Ground
NC
No Connection
OP*
Option
*: OP pin must be open or connected to GND.
• Access Times:
TC55VEM316AXBN
40
55
Access Time
40 ns
55 ns
1
CE
Access Time
40 ns
55 ns
CE2
Access Time
40 ns
55 ns
OE
Access Time
25 ns
30 ns
• Package:
P-TFBGA48-0811-0.75BZ (Weight:
g typ)
A
B
C
D
E
F
G
H
1
OE
UB
I/O11
I/O12
I/O13
I/O14
NC
A8
A0
A3
A5
A17
OP
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
1
CE
I/O2
I/O4
I/O5
I/O6
R/W
A11
CE2
I/O1
I/O3
VDD
VSS
I/O7
I/O8
NC
LB
I/O9
I/O10
VSS
VDD
I/O15
I/O16
A18
2
3
4
5
6


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