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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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CX28332-3X 데이터시트(PDF) 11 Page - Synaptics Incorporated. |
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CX28332-3X 데이터시트(HTML) 11 Page - Synaptics Incorporated. |
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11 / 68 page  100985A Conexant 1-1 1 1.0 Pin Description 1.1 Pin Assignments Figures 1-1 (CX28331-1x), 1-2 (CX28332-1x), and 1-3 (CX28333-1x) illustrate pin assignments for the 80-pin Exposed Thin Quad Flat Package (ETQFP). See Table 1-1 for the CX2833i-1x pin descriptions. Figures 1-4 (CX28331-3x), 1-5 (CX28332-3x), and 1-6 (CX28333-3x) illustrate pin assignments for the 100-pin ETQFP. The 100-pin package adds more functionality, supporting new features such as Transmit Monitoring and Transmit Monitoring Status testing. See Table 1-2 for the CX2833i-3x pin descriptions. The input/output (I/O) column is coded as follows: I = Input O = Output I/O = Bidirectional P = Power NOTE: All digital inputs and outputs contain 75 k Ω pull-down resistors. When a channel is disabled (i.e., the PDx pin is tied low or not connected), all receive and transmit analog circuitry powers down. Analog inputs (RLINE) are ignored and analog outputs (TLINE) are high impedance. Digital inputs of a powered-down channel are still active, but ignored. Overall noise on the device can be lowered by not driving the digital inputs of a powered-down channel. NOTE: When power is disconnected from the device, TLINE pins are low impedance to ground if driven by more than one forward-bias diode voltage (0.7 V) below ground. Additionally, driving TLINE, a forward-bias diode voltage above the VGG pin, creates a low impedance path from the TLINE pin to the VGG pin. Otherwise, the TLINE pins are high impedance. |
유사한 부품 번호 - CX28332-3X |
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유사한 설명 - CX28332-3X |
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