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SLG46140 데이터시트(PDF) 17 Page - Dialog Semiconductor

부품명 SLG46140
상세설명  GreenPAK Programmable Mixed-signal Matrix
Download  170 Pages
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제조업체  DIALOG [Dialog Semiconductor]
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SLG46140 데이터시트(HTML) 17 Page - Dialog Semiconductor

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Page 16 of 169
SLG46140
tpd
Delay
PDLY 1Cells delayed output Rising
edge detect
192.15
--
75.71
--
48.65
--
ns
tpd
Delay
PDLY 1Cells delayed output Fall-
ing edge detect
--
195.73
--
76.60
--
49.42
ns
tpd
Delay
PDLY 1Cells Rising edge detect
31.32
--
12.33
--
8.65
--
ns
tpd
Delay
PDLY 1Cells Falling edge detect
--
35.52
--
13.63
--
9.36
ns
tpd
Delay
PDLY 2Cells Both edge detect
30.68
35.23
12.04
13.47
8.44
9.25ns
tpd
Delay
PDLY 2Cells delayed output Both
edge detect
358.75
362.80
139.97
141.13
88.68
89.64
ns
tpd
Delay
PDLY 2Cells delayed output Rising
edge detect
359.61
--
140.37
--
88.92
--
ns
tpd
Delay
PDLY 2Cells delayed output Fall-
ing edge detect
--
362.93
--
141.33
--
89.66
ns
tpd
Delay
PDLY 2Cells Rising edge detect
31.35
--
12.33
--
8.65
--
ns
tpd
Delay
PDLY 2Cells Falling edge detect
--
35.49
--
13.60
--
9.37
ns
tpd
Delay
PDLY 3Cells Both edge detect
30.65
35.25
12.04
13.51
8.43
9.26ns
tpd
Delay
PDLY 3Cells delayed output Both
edge detect
517.41
521.47
202.97
204.20
128.17
129.08
ns
tpd
Delay
PDLY 3Cells delayed output Rising
edge detect
518.35
--
203.44
--
128.36
--
ns
tpd
Delay
PDLY 3Cells delayed output Fall-
ing edge detect
--
522.00
--
204.27
--
129.16
ns
tpd
Delay
PDLY 3Cells Rising edge detect
31.35
--
12.33
--
8.68
--
ns
tpd
Delay
PDLY 3Cells Falling edge detect
--
35.60
--
13.65
--
9.37
ns
tpd
Delay
PDLY 4Cells Both edge detect
30.76
35.23
12.03
13.53
8.42
9.25ns
tpd
Delay
PDLY 4Cells delayed output Both
edge detect
684.15
688.20
267.31
268.47
168.33
169.41
ns
tpd
Delay
PDLY 4Cells delayed output Rising
edge detect
685.08
--
267.57
--
168.46
--
ns
tpd
Delay
PDLY 4Cells delayed output Fall-
ing edge detect
--
688.67
--
268.47
--
169.54
ns
tpd
Delay
PDLY 4Cells Rising edge detect
31.37
--
12.35
--
8.66
--
ns
tpd
Delay
PDLY 4Cells Falling edge detect
--
35.73
--
13.63
--
9.35
ns
tpd
Delay
PDLY Both edge delay Delayed
output 1CELLs Rising
382.08
382.60
166.57
167.53
121.00
122.74
ns
tpd
Delay
PDLY Both edge delay Delayed
output 2CELLs Rising
730.35
730.80
319.84
321.13
232.80
234.41
ns
tpd
Delay
PDLY Both edge delay Delayed
output 3CELLs Rising
1074.28 1075.93
471.71
473.47
343.46
345.28
ns
tpd
Delay
PDLY Both edge delay Delayed
output 4CELLs Rising
1421.41 1422.60
624.77
626.47
455.13
456.94
ns
tw
Width
PDLY 1Cells Both edge detect
344.67
346.13
153.20
153.73
111.89
112.43
ns
tw
Width
PDLY 1Cells delayed output Both
edge detect
348.67
350.20
152.07
152.73
110.93
111.13
ns
tw
Width
PDLY 1Cells delayed output Rising
edge detect
348.80
--
152.20
--
110.80
--
ns
tw
Width
PDLY 1Cells delayed output Fall-
ing edge detect
--
349.93
--
152.87
--
111.39
ns
Symbol Parameter
Note
VDD=1.8V
VDD=3.3V
VDD=5.0V
Unit
Rising
Falling
Rising
Falling
Rising
Falling


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