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SLG46532 데이터시트(PDF) 89 Page - Dialog Semiconductor |
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SLG46532 데이터시트(HTML) 89 Page - Dialog Semiconductor |
89 / 184 page SLG46532_DS_108 Page 88 of 183 SLG46532 9.8 4-Bit LUT or 16-Bit Counter / Delay Macrocells There are two macrocells that can serve as either 4-bit LUTs or as 16-bit Counter / Delays. When used to implement LUT function, the 4-bit LUT takes in four input signals from the Connection Matrix and produces a single output, which goes back into the Connection Matrix. When used to implement 16-Bit Counter / Delay function, four input signals from the connection matrix go to the external clock (ext_clk), reset (DLY_in/CNT_Reset), Keep and Up for the counter/delay, with the output going back to the connection matrix. These two macrocells have an optional Finite State Machine (FSM) function. There are two matrix inputs for Up and Keep to support FSM functionality These macrocells can also operate in a one-shot mode, which will generate an output pulse of user-defined width. These macrocells can also operate in a frequency detection or edge detection mode. Both of these macrocells can have their active count value read via I2C. See Section 19.4.6.3 Reading Counter Data via I2C for further details 9.8.1 4-Bit LUT or 16-Bit CNT/DLY Block Diagram Figure 35. 4-bit LUT0 or CNT/DLY0 CNT/DLY0 OUT clk DLY_n/CNT_Reset 4-bit LUT0 OUT IN0 IN1 16-bits NVM 1-bit NVM IN2 IN3 reg <1591:1576> reg <1193> From Connection Matrix Output <101> From Connection Matrix Output <104> From Connection Matrix Output <102> To Connection Matrix Input <22> FSM UP KEEP From Connection Matrix Output <103> LUT Truth Table CNT Data 0: 4-bit LUT0 IN1 1: CNT/DLY0 clk 0: 4-bit LUT0 OUT 1: CNT/DLY0 OUT 0: 4-bit LUT0 IN0 1: CNT/DLY0 RST 0: 4-bit LUT0 IN2 1: FSM UP 0: 4-bit LUT0 IN3 1: FSM KEEP S0 S1 S0 S1 S0 S1 S0 S1 S0 S1 |
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