전자부품 데이터시트 검색엔진 |
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SLG46532 데이터시트(PDF) 34 Page - Dialog Semiconductor |
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SLG46532 데이터시트(HTML) 34 Page - Dialog Semiconductor |
34 / 184 page SLG46532_DS_108 Page 33 of 183 SLG46532 6.0 Summary of Macro Cell Function 6.1 I/O Pins • Digital Input (low voltage or normal voltage, with or without Schmitt Trigger) • Open Drain Outputs • Push Pull Outputs • Analog I/O • 10 k /100 k/1 Mpull-up/pull-down resistors • 40 mA Open Drain 4X Drive output 6.2 Connection Matrix • Digital matrix for circuit connections based on user design 6.3 Analog Comparators (4 total) • Selectable hysteresis 0 mV / 25 mV / 50 mV / 200 mV • Wake and Sleep Control (Part of Combination Function Macrocell) 6.4 Voltage Reference • Used for references on Analog Comparators • Can also be driven to external pins 6.5 Combination Function Macrocells (17 total) • Three Selectable DFF/Latch or 2-bit LUTs • Five Selectable DFF/Latch or 3-bit LUTs • One Selectable Pipe Delay or 3-bit LUT • One Selectable Programmable Function Generator or 4-bit LUT • Five Selectable 8-bit CNT/DLY or 3-bit LUT • Two Selectable 16-bit CNT/DLY or 4-bit LUT • Wake and Sleep Controller 6.6 State Machine • Eight States • Flexible input logic from state transitions 6.7 Serial Communications •I2C Protocol compliant 6.8 Pipe Delay (Part of Combination Function Macrocell) • 16 stage / 3 output • One 1 stage fixed output • Two 1-16 stage selectable outputs. |
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유사한 설명 - SLG46532 |
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