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TC55VEM208ASTN55 데이터시트(HTML) 4 Page - Toshiba Semiconductor

부품명 TC55VEM208ASTN55
상세내용  TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
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제조사  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
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TC55VEM208ASTN55 데이터시트(HTML) 4 Page - Toshiba Semiconductor

 
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TC55VEM208ASTN40,55
2002-08-07
4/11
AC CHARACTERISTICS AND OPERATING CONDITIONS
(Ta
==== −−−−40° to 85°C, VDD ==== 2.7 to 3.6 V)
READ CYCLE
TC55VEM208ASTN
40
55
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX
UNIT
tRC
Read Cycle Time
40
55
tACC
Address Access Time
40
55
tCO
Chip Enable Access Time
40
55
tOE
Output Enable Access Time
25
30
tCOE
Chip Enable Low to Output Active
5
5
tOEE
Output Enable Low to Output Active
0
0
tOD
Chip Enable High to Output High-Z
20
25
tODO
Output Enable High to Output High-Z
20
25
tOH
Output Data Hold Time
10
10
ns
WRITE CYCLE
TC55VEM208ASTN
40
55
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX
UNIT
tWC
Write Cycle Time
40
55
tWP
Write Pulse Width
30
40
tCW
Chip Enable to End of Write
35
45
tAS
Address Setup Time
0
0
tWR
Write Recovery Time
0
0
tODW
R/W Low to Output High-Z
20
25
tOEW
R/W High to Output Active
0
0
tDS
Data Setup Time
20
25
tDH
Data Hold Time
0
0
ns
Note:
tOD, tODO and tODW are specified in time when an output becomes high impedance, and are not judged depending on an
output voltage level.


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