전자부품 데이터시트 검색엔진 |
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SN74AUP1G79DBVRE4 데이터시트(PDF) 2 Page - Texas Instruments |
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SN74AUP1G79DBVRE4 데이터시트(HTML) 2 Page - Texas Instruments |
2 / 15 page SN74AUP1G79 LOW POWER SINGLE POSITIVEEDGETRIGGERED DTYPE FLIPFLOP SCES592A − JULY 2004 − REVISED SEPTEMBER 2005 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description/ordering information (continued) NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING‡ NanoStar − WCSP (DSBGA) 0.23-mm Large Bump − YEP Reel of 3000 SN74AUP1G79YEPR _ _ _HW_ −40 C to 85 C NanoFree − WCSP (DSBGA) 0.23-mm Large Bump − YZP (Pb-free) Reel of 3000 SN74AUP1G79YZPR _ _ _HW_ −40 °C to 85°C SOT (SOT-23) − DBV Reel of 3000 SN74AUP1G79DBVR H79_ SOT (SOT-23) − DBV Reel of 250 SN74AUP1G79DBVT H79_ SOT (SC-70) − DCK Reel of 3000 SN74AUP1G79DCKR HW_ SOT (SC-70) − DCK Reel of 250 SN74AUP1G79DCKT HW_ † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). FUNCTION TABLE INPUTS OUTPUT CLK D OUTPUT Q ↑ H H ↑ LL L or H X Q0 logic diagram (positive logic) D CLK Q CLK D Q |
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