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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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FM21L16-60-TGTR 데이터시트(PDF) 8 Page - Cypress Semiconductor |
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FM21L16-60-TGTR 데이터시트(HTML) 8 Page - Cypress Semiconductor |
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8 / 22 page  FM21L16 Document Number: 001-86191 Rev. *D Page 8 of 22 SRAM Drop-In Replacement The FM21L16 is designed to be a drop-in replacement for standard asynchronous SRAMs. The device does not require CE to toggle for each new address. CE may remain LOW for as long as 10 µs. While CE is LOW, the device automatically detects address changes and a new access begins. It also allows page mode operation at speeds up to 33 MHz. Figure 6 shows a pull-up resistor on CE, which will keep the pin HIGH during power cycles, assuming the MCU / MPU pin tristates during the reset condition. The pull-up resistor value should be chosen to ensure the CE pin tracks VDD to a high enough value, so that the current drawn when CE is LOW is not an issue. A 10-k resistor draws 330 µA when CE is LOW and VDD = 3.3 V Note that if CE is tied to ground, the user must be sure WE is not LOW at power-up or power-down events. If CE and WE are both LOW during power cycles, data will be corrupted. Figure 7 shows a pull-up resistor on WE, which will keep the pin HIGH during power cycles, assuming the MCU / MPU pin tristates during the reset condition.The pull-up resistor value should be chosen to ensure the WE pin tracks VDD to a high enough value, so that the current drawn when WE is LOW is not an issue. A 10-k resistor draws 330 µA when WE is LOW and VDD = 3.3 V. Note If CE is tied to ground, the user gives up the ability to perform the software write-protect sequence. For applications that require the lowest power consumption, the CE signal should be active (LOW) only during memory accesses. The FM21L16 draws supply current while CE is LOW, even if addresses and control signals are static. While CE is HIGH, the device draws no more than the maximum standby current, ISB. CE toggling LOW on every address access is perfectly acceptable in FM21L16. The UB and LB byte select pins are active for both read and write cycles. They may be used to allow the device to be wired as a 256 K × 8 memory. The upper and lower data bytes can be tied together and controlled with the byte selects. Individual byte enables or the next higher address line A17 may be available from the system processor. Figure 6. Use of Pull-up Resistor on CE MCU / MPU CE WE OE A16-0 DQ15-0 FM21L16 VDD Figure 7. Use of Pull-up Resistor on WE Figure 8. FM21L16 Wired as 256 K × 8 MCU / MPU CE WE OE A16-0 DQ15-0 FM21L16 VDD DQ CE UB LB WE OE ZZ 2-Mbit F-RAM FM21L16 A 15-8 DQ 7-0 D 7-0 16-0 A 17 A 16-0 |
유사한 부품 번호 - FM21L16-60-TGTR |
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유사한 설명 - FM21L16-60-TGTR |
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