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S71GL064A 데이터시트(PDF) 91 Page - SPANSION

부품명 S71GL064A
상세설명  STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
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February 8, 2005 S71GL064A_00_A2
S71GL064A based MCPs
89
Advance
Informatio n
Table 22. 32Mb pSRAM Page Mode
Page Mode
Version
C
E
Performance Grade
-65
-60
-65
-70
Density
32Mb pSRAM
32Mb pSRAM
32Mb pSRAM
32Mb pSRAM
3 Volt
Symbol
Parameter
Min
Max
Units
Min
Max
Units
Min
Max
Units
Min
Max
Units
trc
Read cycle time
65
20k
ns
60
20k
ns
65
20k
ns
70
20k
ns
taa
Address Access
Time
65
ns
60
ns
65
ns
70
ns
tco
Chip select to
output
65
ns
60
ns
65
ns
70
ns
toe
Output enable to
valid output
20
ns
25
ns
25
ns
25
ns
tba
UB#, LB# Access
time
65
ns
60
ns
65
ns
70
ns
tlz
Chip select to
Low-z output
10
ns
10
ns
10
ns
10
ns
tblz
UB#, LB# Enable
to Low-Z output
10
ns
10
ns
10
ns
10
ns
tolz
Output enable to
Low-Z output
5
ns
5
ns
5
ns
5
ns
thz
Chip enable to
High-Z output
020
ns
0
5
ns
0
5
ns
0
5
ns
tbhz
UB#, LB#
disable to High-Z
output
020
ns
0
5
ns
0
5
ns
0
5
ns
tohz
Output disable to
High-Z output
020
ns
0
5
ns
0
5
ns
0
5
ns
toh
Output hold from
Address Change
5
ns
5
ns
5
ns
5
ns


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