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ACT2861QI 데이터시트(PDF) 26 Page - Active-Semi, Inc |
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ACT2861QI 데이터시트(HTML) 26 Page - Active-Semi, Inc |
26 / 91 page ACT2861QI Rev 2.0, 27-Apr-2018 Innovative PowerTM www.active-semi.com ActiveSwitcherTM is a trademark of Active-Semi Copyright © 2018 Active-Semi, Inc. 26 Figure 5: OTG State Machine Diagram OTG Light Load Disable State (OTG_LL_DIS) In the state, the converter is disabled to minimize load on the battery. It prevents the converter from switching with no load. The state machine enters OTG_LL_DIS when it senses a light load for longer than the light load time out time. This time is set by I2C bit OTG_OFF_DLY[1:0] in regis- ter 0x0Eh. Note that the converter only enters OTG_LL_DIS when operating in buck mode. It does not enter OTG_LL_DIS when in boost or buck-boost mode. The state machine can only exit OTG_LL_DIS when the IC exits the OTG Mode by the nOTG pin or HIZ register. OTG Hiccup / Vout Fault State (OTG_HICCUP) This state is a fault state that minimized overall IC power dissipation in extreme output overload conditions. The state machine enters this state when the OTG out- put cannot support the load. When the OTG output reaches the maximum programmed output current, it clamps the current and the voltage starts to drop. If the load increases, the output voltage drops even further. If it drops below VOTG_UVP (3.0V), the converter is disabled for 3s. After 3s, it automatically moves to OTG_RST and restarts. If there is a fault on the output, this cycle con- tinues until the fault is removed. |
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